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mirror of https://github.com/PDP-10/its.git synced 2026-02-14 20:06:27 +00:00

SUDS - Stanford University Drawing System.

This commit is contained in:
Lars Brinkhoff
2018-04-25 13:38:34 +02:00
parent b69c2988bb
commit 33074b453f
86 changed files with 83656 additions and 3 deletions

21
src/wl/board0.9 Normal file
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;;The set of boards currently defined
;;NOTE: The .insert's can't specify directory, because losing
;; FAIL doesn't reset the directory name when popping back
;; to the previous level of .INSERT. Therefore all files
;; have to on the same directory, perhaps as links.
.insert BOARD1
.INSERT NCP13
.insert UG61C
.insert DECLOC
.insert LG627
.insert MPG21
.insert MPG216
.insert LG684
;.insert LG411
;.insert W940
.insert BOARD2

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src/wl/board1.555 Normal file

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;<WIRELIST>BOARD2.FAI.10, 20-NOV-75 13:56:46, EDIT BY HELLIWELL
SUBTTL NOMENCLATURES
.DONE(ALLLOCS)
MDWL,<
.DONE(ALLWW)
>;MDWL
DEFINE MAKDEF(BOARD,INDEX)
<DEFINE BRDNAM(NAME,LOCS)
<IFIDN<BOARD><NAME><INDEX__...TMP>
...TMP__...TMP+1
>
...TMP__0
ALLLOCS
IFNDEF INDEX,<INDEX__-2 ;SO WON'T MATCH ANYWHERE
PRINTS /BOARD NOT FOUND AS NOMEN TYPE - MAKDEF
/
>
>
MD,< MAKDEF(MPG21,MPGNOM)
MAKDEF(PG21,PGNOM)
>
MDPC,< MAKDEF(DEC,DEFNOM) >
NODEC,< ININOM__-1 >
III,< MAKDEF(DEC,ININOM) >
DEC,< MAKDEF(DEC,ININOM) >
DEFINE BRDNAM (NAME,LOCS)
< POINT 7,[ASCIZ \NAME\]
>
POINT 7,[ASCIZ \NOMENCLATURE NOT SPECIFIED\]
LNAMES: ALLLOCS
NLOCS__.-LNAMES
DEFINE BRDNAM (NAME,LOCS)
< LOCS
>
LNOBRD ;BOARD TYPE -1 IS "BOARD UNSPECIFIED"
LOCTVV: ALLLOCS
CHECK LOCTVV,NLOCS
SUBTTL WIREWRAP BOARDS
MDWL,<
DEFINE MAKDEF(BOARD,INDEX)
<
DEFINE BRDNAM(NAME,LOCS)
<IFIDN<BOARD><NAME><INDEX__...TMP>
...TMP__...TMP+1
>
...TMP__0
ALLWW
>
INIWW__-1 ;BOARD TYPE SELECTED AT STARTUP
DEFWW__-1
DEFNOM__-1
NODEC,<NOIII,<MAKDEF(W940,DEFWW)>>
DEFINE BRDNAM (NAME,WWC)
< POINT 7,[ASCIZ \NAME\]
>
POINT 7,[ASCIZ \BOARD NOT SPECIFIED\]
WNAMES: ALLWW
NWW__.-WNAMES
MWL,<
DEFINE BRDNAM (NAME,WWC)
< WWC
>
WNOBRD ;BOARD TYPE -1 AGAIN
WWCTVV: ALLWW
CHECK WWCTVV,NWW
>;MWL
>;MDWL

20
src/wl/boards.11 Normal file
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title boards
;;For producing separate REL boards file for D or PC
COMMENT 
.XCREF A,B,C,D,E,F,G,H,M,P,T,TT,TTT

boards__-1 ;tell FIRST that we're assembling for BOARDS
.insert SWITCH
.insert FIRST
.insert BOARD0
XLIST
LIT
STORAGE(IMPURE)
VAR
LIST
END

604
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.ADD(ALLLOCS,DEC,DECTV)
MDWL,<
.ADD(ALLWW,DEC,DECWTV)
>;MDWL
;Note! These .ADD's must be outside of block structure
BEGIN DEC
%DIPL__<POINT 6,,23>-=18 ;DIP GROUP (The letter)
%DIPS__<POINT 6,,29>-=18 ;DIP SLOT (The number)
;%DIPOF__<POINT 6,,35>-=18 ;DIP OFFSET
%CONL__<POINT 6,,23>-=18 ;PADDLE LETTER
%CONN__<POINT 6,,29>-=18 ;CONNECTOR NUMBER (LETTER OR JACK #)
%CONP__<POINT 6,,35>-=18 ;CONNECTOR PIN #
MXDPIN__=18
MXDCON: 6
MWL,<
comment 
All calculations are done from the DIP side.
(0,0) at LOWER left hand corner in left handed coordinate system.
X+ to right, Y+ is up
0,0 corresponds to FV1 of DEC connectors.

XDIPSP__ =500 ; .500" DIP HORIZONTAL SPACING
YDIPSP__=1100 ;1.100" DIP VERTICAL SPACING
;assume any old spacing
xgrpof__=600
YGRPOF__=600 ;VERTICAL DISTANCE FROM ORIGIN TO DIP PIN10 OF F1
XPINSP__ =300 ; .300" DIP PIN HORIZONTAL SPACING
YPINSP__ =100 ; .100" DIP PIN VERTICAL SPACING
XGNDOFF__-=100 ;OFFSET FROM DIP SLOT ORIGIN (ON EXTRA GROUND ROW) TO FIRST DIP
;PIN ROW
;CONNECTORS, DEC
DECCNY__=0 ;0.0" UP TO BOTTOM ROW OF DEC CONNECTORS
DCPINO__=200 ;.2" UP FROM BOTTOM TO SECOND ROW
DECX1__=2700 ;2.7" LEFT FOR LARGE CONNECTOR SPACES
DECX2__=2600 ;2.6" LEFT FOR SMALL CONNECTOR SPACES
GAP1T2__DECX2-=1900 ; THE SMALLER GAP BETWEEN DEC PADDLES
DCPINS__=1900 ;1.9" RIGHT FOR PIN A1 RELATIVE TO START OF CONNECTOR
DCPNSP__=100 ;.1" BETWEEN PINS HORIZONTALLY
DCGRSP__=200 ;.2" BETWEEN GROUPS OF PINS
>;MWL
;THE TRANSFER VECTOR FOR THE AUGUAT dec
^dectv:
JRST LCINIT ;BOARD INITIALIZATION
JRST QUPIN ;CHECKS FOR WILD CONNECTOR BODIES
JRST $SLTOUT ;PRINTS CARD LOC (B-R-S)
JRST $GETSLT ;READS CARD LOC (B-R-S)
JRST PRNLOC ;PRINTS SOCKET, DIP, OR CONNECTOR LOC
JRST PRNPIN ;PRINTS SOCKET, DIP, OR CONNECTOR PIN
JRST CPNSEP ;SEPARATE CONNECTORS LOC/PIN PARTS FROM 18 BIT FORM
JRST CPNMER ;MERGE CONN LOC/PIN PARTS BACK
JRST CPNMAP ;MAP CARD LOC, CPIN-LOC INTO BACKPANEL PIN LOC
MDWL,< JRST MAPOST > ;CONVERT FROM DIP-LOC/PIN TO POST
MDPC,<
JRST GTSLTL ;READS (B-R-S) AND BODY LOCN
MD,< JRST GTCONP ;READS (B-R-S) AND CONNECTOR PIN
JRST CPOPJ ;LOCFUK
>;MD
>;MDPC
MWL,<
JRST GETLOC ;READS EITHER DIP LOC, OR CONNECTOR LOC
JRST RAYDIP ;PRINTS DIP, OR CONNECTOR LOC IN FORTRAN FORM
JRST CPARTP ; (PRINT EDGE PIN TO PARTITION FILE)
JRST SEQLOC ;TESTS FOR BODY LOCS BEING SEQUENTIAL
JRST CONGIN ;GENERATE NEXT INVENTED PIN TO REPLACE "U" PINS
JRST $GTSLTT ;GETSLT, BUT WITH FIRST CHAR IN CHRREG
JRST AUGDIP
>;MWL
[ASCIZ/L#/] ; CUE FOR BOARD SLOT
[ASCIZ /#/] ; CUE FOR BOARD PIN
MDPC,< [ASCIZ/LL# /] ;CUE FOR CONNECTOR PIN
[ASCIZ/L# /] ;CUE FOR BODY LOC
[ASCID /A01/] ;PROTOTYPE FOR BODY LOC
>;MDPC
MWL,< [ASCIZ/L#/] ;WIRELISTER BODY CUE
[ASCIZ/L/] ;WIRELISTER CONNECTOR BODY CUE
>;MWL
CHECK dectv,LTVLEN
L2NSUB: BLOCK L2NLEN ;*******
N2LSUB: REPEAT N2LLEN, < "?"
>
EN2L__.
NNN__1
FOR I IN(A,B,C,D,E,F,H,J,K,L,M,N,P,R,S,T,U,V)
< L2N2L I,0
>
FOR I IN (G,I,O,Q)
< L2N2L I,1B0
>
N2LMAX__NNN-1
ORG EN2L
LCINIT: MOVE T,[L2NSUB,,L2N]
BLT T,L2N+L2NLEN+N2LLEN-1
MOVEI T,N2LMAX
MOVEM T,MAXN2L
POPJ P,
MWL,<
DEC684__4
;**************************************** DEC CONNECTOR PINS
DCLOC: ;LOCATION OF DEC STYLE CONNECTORS
X__DECX1*<DEC684/2>+DECX2*<DEC684/2-1> ;THE X OF V1 ON THE RIGHTMOST PADDLE!
;INITIALLY FAR TO THE RIGHT, CONNECTORS LETTERED IN REVERSE
REPEAT DEC684/2,
< X,,DECCNY
X__X-DECX1
X,,DECCNY
X__X-DECX2
>
>;MWL
PRNLOC: SETZ TT,
JUMPE A,CPOPJ
JUMPL A,CNLOC
LDB T,[%DIPL,,A] ;GROUP LETTER
JUMPE T,CPOPJ ;GROUP NULL?
PUTBYT @N2L(T) ;CONVERT TO LETTER AND PRINT
MOVEI T,2 ;SETUP FOR 2 DIGIT NUMBER PRINT
MOVEM T,NDIG
LDB T,[%DIPS,,A] ;SLOT NUMBER WITHIN GROUP
PUSHJ P,NPUTDEC ;PRINT IT OUT
; MOVEI T,2 ;SETUP FOR 2 DIGIT NUMBER PRINT
; MOVEM T,NDIG
; LDB T,[%DIPOF,,A] ;ANY SLOT OFFSET?
; JUMPE T,PRNLC1
; PUTBYT "@"
;MWL,< PUSHJ P,NPUTDEC >
;MDPC,< PUSHJ P,PUTDEC >
PRNLC1: MOVEI TT,"-"
POPJ P,
CNLOC:
CNDEC: LDB T,[%CONL,,A] ;CONNECTOR ROW NUMBER
PUTBYT @N2L(T)
SETZ TT, ;DEC DOESN'T WANT SEP BETWEEN A,A1
POPJ P,
PRNPIN: LDB T,[%%PINN,,A]
JUMPL A,PRNPNC
MWL,<
MOVEI TT,2
MOVEM TT,NDIG
JRST NPUTDEC
>;MWL
MDPC,< JRST PUTDEC
JRST PUTDEC >
PRNPNC:
ASH T,-1
PUTBYT @N2L(T) ;PRINT DEC CONNECTOR LETTER
LDB T,[%%PINN,,A]
ANDI T,1
ADDI T,1
JRST PUTDEC
;CONVERT PIN-SPEC TO POST-SPEC
;MAPOST (DWL) - CONVERT FROM DIP-LOC,PIN# TO SOCKET-LOC, PIN#
;A = MBIT+PIN#,,LOC
;B = PACKAGE
;Skips if can map, with MAPSOC set.
; Possibly MAPPWR or MAPGND if V or G posts on board
;A = New MBIT+PIN#,,LOC
;B = FLAGS,,PIN CHANGE
; %MPLOC ;LOC WAS CHANGED
; %MPPIN ;PIN WAS CHANGED, DIFFERENCE IN RH (TO CHECK FOR +1)
; %MPPL1 ;PIN NUMBER CHANGED BY 1 (KLUDGE)
MDWL,<
MAPOST: TLNN A,CRDPIN ;SHOULDN'T BE ON
TLOE A,MAPSOC
OUTSTR [ASCIZ /PIN ALREADY MAPPED TO POST???
/]
JUMPL A,[SETZ B, ;CONNECTOR, NO CHANGE
JRST CPOPJ1]
PUSH P,C
PUSH P,D
PUSH P,A
SETZ D,
; LDB D,[%DIPOF,,A] ;OFFSET FIELD WITHIN SOCKET
LDB A,[%%PINN,,A]
JUMPE A,MAPOS1
MOVEI C,=16 ;BOARD HAS 20 PIN SOCKETS
PUSHJ P,MAPPER
JRST MAPOSX
LDB T,[%DIPS,,(P)] ;NOW OFFSET SLOT
ADD T,C
DPB T,[%DIPS,,(P)]
LDB T,[%DIPL,,(P)] ;FIRST ROW IS A (=1)
ADD T,D ;DOES OFFSET OVERFLOW NO. OF ROWS?
DPB T,[%DIPL,,(P)]
MAPOS1: SETZ T,
; DPB T,[%DIPOF,,(P)] ;WITHIN SOCKET OFFSET GOES AWAY
DPB A,[%%PINN,,(P)]
AOS -3(P)
MAPOSX: POP P,A
POP P,D
POP P,C
POPJ P,
>;MDWL
GTSLTL: PUSH P,A
MOVEI A,[[ASCIZ /L#./]
0]
PUSHJ P,LNPARS
JRST GTSL0
JRST GTSL1
SETZ TT,
PUSHJ P,GATLOC
JRST GTSL0
IFN 0,< CAIE CHRREG,"@"
JRST GTSL2
PUSH P,TT
GETNUM
POP P,TT
JUMPE NUMREG,GTSL0
DPB NUMREG,[%DIPOF,,TT]
>;IFN 0
GTSL2: MOVEM TT,DESTIN
AOS -1(P)
GTSL1: AOS -1(P)
GTSL0: POP P,A
POPJ P,
GATLOC: MOVE A,ARG1
DPB A,[%DIPL,,TT]
MOVE A,ARG2
DPB A,[%DIPS,,TT]
JRST CPOPJ1
MD,<
;THIS SHOULD PROBABLY TRY FOR B-R-S ALSO, BUT...?
GTCONP: PUSH P,A
MOVEI A,[[ASCIZ /LL#/]
0]
PUSHJ P,LNPARSE
JRST GTCON0
JRST GTCON1 ;NULL INPUT
PUSHJ P,GATCON ;GET JACK OR PADDLE PART OF LOC
JRST GTCON0
SKIPE A,ARG2 ;READ AND CONVERT DEC CONNECTOR PIN NUMBER
CAILE A,MXDPIN/2
JRST GTCON0 ;LETTER TOO BIG
SOSL A,ARG3
CAILE A,1
JRST GTCON0
MOVE A,ARG2
ASH A,1
IOR A,ARG3
GTCON3: DPB A,[%CONP,,TT]
HRRZM TT,DESTIN
AOS -1(P)
GTCON1: AOS -1(P)
GTCON0: POP P,A
POPJ P,
>;MD
GATCON: SETZ TT,
GTCN1: SKIPE A,ARG1
CAMLE A,MXDCON ;MAX NUMBER OF DEC CONNECTORS
POPJ P,
DPB A,[%CONL,,TT]
GTCN2: TLO TT,MAPCON
JRST CPOPJ1
MWL,<
GETLOC: MOVEI A,[[ASCIZ /L#/] ;0 - Board socket
[ASCIZ /L/] ;1 - Dec connector
0]
PUSHJ P,LNPARSE
POPJ P,
POPJ P,
SKIPE A
JRST GATCON
SETZ TT,
JRST GATLOC
;Print location for fixed format card image
;8 cols wide, with "group" left justified, "pin number" right justified
RAYDIP: TLNN A,MAPSOC
PUSHJ P,FUCKUP
PUSHJ P,PRNLOC ;A01 or J01 or C
LDB T,[%%PINN,,A] ;DIP PIN NUMBER
JUMPL A,RAYCON
PUTSTR [ASCIZ / /] ;3 SPACES
MOVEI TTT,2
MOVEM TTT,NDIG
JRST NPUTDEC ;"A01" + 3 spaces + ## = 8
RAYCON: PUTSTR [ASCIZ / /] ;3 spaces
PUTSTR [ASCIZ / /] ;"C" + 5 spaces
LDB T,[%%PINN,,A]
TRNN T,1
PUTBYT "1"
TRNE T,1
PUTBYT "2"
ASH T,-1
PUTBYT @N2L(T)
POPJ P, ;"C" + 5 spaces + #L = 8
FOR NAME IN (AUGDIP:,CPARTP:,CONGIN:,SEQLOC:)
<NOTYET(NAME)
>
>;MWL
CPNSEP: LDB TT,[%CONP,,T]
LDB TTT,[%CONN,,T]
LSH TTT,1
ADD TT,TTT
MOVEI TTT,0
DPB TTT,[%CONP,,T]
DPB TTT,[%CONN,,T]
POPJ P,
CPNMER: PUSH P,A
SKIPN T
SKIPE TT
JRST CPNMR1
MOVEI TT,1 ;T,TT=0 MEANS INITIALIZE TO FIRST
DPB TT,[%CONL,,T]
CPNMR1: CAIG TT,=36
JRST CNPMR1
MOVEI TT,1
LDB TTT,[%CONL,,T]
AOS TTT
DPB TTT,[%CONL,,T]
CNPMR1: SOS TT
IDIVI TT,2
AOS TT
DPB TT,[%CONN,,T]
AOS TTT
DPB TTT,[%CONP,,T]
POP P,A
POPJ P,
QUPIN: SETZ A, ;NO RULE NUMBER
POPJ P, ;AND IT'S NOT WILD
NOTYET(CPNMAP:)
MDWL,<
MWL,<
SUBTTL WIRE WRAP ROUTINES -- HEX DEC 20 PIN BOARDS
^^DECWTV__. ;TRANSFER VECTOR FOR QUAD HEIGHT 20 PIN DEC BOARDS
-1 ;FLAGS IF WIRE WRAP OR PC BOARD
JRST CPOPJ ;THE INIT ROUTINE
JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS
JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS
JRST DISTPP ;DISTANCE CALC ROUTINE
JRST FPWR ;FIND A POST WITH POWER
JRST FGND ;FIND A POST WITH GND
JRST MAPIT ;CONVERT POST INTO X,Y,BITS
JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE
JRST GNDCLR ;?
JRST WAGGND ;?
JRST GNDOUT ;?
JRST VCCOUT ;?
=30 ;NROWS (USED FOR UML ONLY)
=12 ;NCOLS (USED FOR UML ONLY)
6 ;NCLPRG (USED FOR UML ONLY)
6 ;NRWPRP (USED FOR UML ONLY)
=180 ;DIPSLT_NROWS*NCOLS (USED FOR UML ONLY)
SETPAD(=12) ;NPADS (USED FOR UML ONLY)
XWD -=18,1 ;PADLET (USED FOR UML ONLY)
XWD -2,1 ;PADPIN (USED FOR UML ONLY)
=10 ;FRACTN
=200*2 ;WRAPMG .200" INSULATION AROUND EACH POST
=1500 ;POSTMG .750" BARE WIRE AROUND EACH POST
0 ;NEXTR
CHECK DECWTV,WTVLEN
;TABLES FOR MAPIT
;**************************************** DIP PINS
DEFINE XY(X,Y)
< X*XPINSP,,Y*YPINSP
>
;Pin position offset from socket origin (pin 10, lower left). DIP side!
PINTAB:
FOR Y_9, 0, -1
< XY(0,Y)
>
FOR Y_0, 9, 1
< XY(1,Y)
>
;**************************************** DEC CONNECTOR PINS
;PIN POSITIONS WITHIN ONE PADDLE
X__DCPINS ;INITIAL X STARTING LOCATION
DCPINL:
REPEAT 3,
<
REPEAT 6,
< X,,0
X,,DCPINO
X__X-DCPNSP
>
X__X-DCGRSP+DCPNSP ;ALREADY SUB'ED AN EXTRA DCPNSP AT END OF RPT
>
DCPWRG: 0 ;A1
PWR,,500
0 ;B1
0
0 ;C1
GND,,0
DCGNDT__.-DCPWRG+1
0 ;D1
0
0 ;E1
0
0 ;F1
0
0 ;H1
0
0 ;J1
0
0 ;K1
0
0 ;L1
0
0 ;M1
0
0 ;N1
0
0 ;P1
0
0 ;R1
0
0 ;S1
0
GND,,0 ;T1
DCGNDB__.-DCPWRG+1
0
0 ;U1
0
0 ;V1
0
MAPIT: JUMPL A,CONMAP ;MAP CONNECTOR LOCATION
PUSHJ P,MAPLOC ;MAP DIP LOCN
POPJ P, ;BAD LOCN
LDB TTT,[%%PINN,,A] ;PIN #
MAPIT0: ADD T,PINTAB-1(TTT) ;ADD EXTRA XY FOR PIN
SETZ TT,
SETZ TTT, ;FLUSH AWAY THOSE GOODIES
JRST CPOPJ1
;Convert PIN-SPEC in A into DIP X,Y locn (T)
;Y + UP
;X + RIGHT (FROM DIP SIDE)
MAPLOC: LDB TT,[%DIPL,,A] ;GROUP LETTER
JUMPE TT,CPOPJ
LDB T,[%DIPS,,A] ;DIP #
;Slot 1 is X=0
SOS T
IMULI T,XDIPSP ;SLOT NUMBER IS OFFSET HORIZONTALLY
HRLZ T,T
;Row F is Y=0
IMULI TT,YDIPSP ;CALCULATE Y OFFSET
HRR T,TT
ADD T,[XGRPOF,,YGRPOF] ;ADD IN OFFSET FOR ENTIRE DIP ARRAY
JRST CPOPJ1
;HERE FOR CONNECTOR PINS
CONMAP:
CONDEC: LDB TT,[%CONN,,A]
JUMPE TT,CPOPJ
CAMLE TT,MXDCON
POPJ P,
MOVE T,DCLOC-1(TT) ;PADDLE X,Y
LDB TT,[%%PINN,,A]
CAIL TT,2 ;2+0 IS A+1 PIN
CAILE TT,MXDPIN+2-1
POPJ P,
ADD T,DCPINL-2(TT)
MOVE TT,DCPWRG-2(TT)
SETZ TTT,
JRST CPOPJ1
PAKSIZ: SKIPE ILLPAK(B)
POPJ P,
JRST PAKDIM
;Define illegal package types in this board
; -1 if illegal
ILLPAK: BLOCK NPACK
FOR @' I IN (22,24,36,40,48,64)
<ORG ILLPAK+K.'I  -1
>
ORG ILLPAK+NPACK
MAPRC: HLRZ TT,T ;(1,1) IS DIP IN UPPER LEFT HAND CORNER
HRRZS T ;ROW IN TT, COL IN T
PUSH P,[0]
DPB TT,[%DIPS,,(P)]
DPB T,[%DIPL,,(P)]
POP P,T
JRST CPOPJ1
MAPPAD: SOS TT
ASH TT,1 ;TT,TTT HAVE COMPLEX PIN#
ADDI TT,(TTT)
AOS TT ;DEC PADDLES ARE PINLETTER*2+SIDE
CAILE TT,MXDPIN+2-1 ;EXISTS?
JRST MAPPDL ;NO, ERROR
MAPPD2: MOVSI TTT,MAPCON(TT) ;PIN# IN LH
DPB T,[%CONN,,TTT]
HLRZS T
SKIPA T,TTT
MAPPDL: SETZ T, ;LOSE RETURN
POPJ P,
FPWR: SETZ A,
POPJ P,
IFN 0,<
CAIE B,=500 ;+5.00V??
JRST [ SETZ A,
POPJ P,]
MOVE T,A ;SAVE IF CONN PIN
MOVEI B,BRDPWR
DPB B,[%%PINN,,A]
TLO A,MAPSOC
JUMPL A,FPWRC
POPJ P,
>;IFN 0
FGND: SETZ A,
POPJ P,
IFN 0,<
MOVE T,A
MOVEI B,BRDGND
DPB B,[%%PINN,,A]
TLO A,MAPSOC
JUMPL A,FGNDC
POPJ P,
FGNDC: LDB TT,[%CONT,,A]
JUMPE TT,FGNDDC
LDB TT,[%CONN,,A] ;USE ROW OF GNDS ON OTHER HALF OF CONN
LDB T,[%%PINN,,T] ;ORIGINAL PIN#
HRRZ TT,JACKSZ(TT)
ASH TT,-1
CAMG T,TT
ADD T,TT
FGNDC1: DPB T,[%%PINN,,A]
TLO A,MAPSOC
POPJ P,
>;IFN 0
FOR NAME (GNDCLR:,WAGGND:,GNDOUT:,VCCOUT:)
<NOTYET(NAME)
>
>;MWL
>;MDWL
BEND DEC

587
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@@ -0,0 +1,587 @@
.ADD(ALLLOCS,FOONLY,FOOTV)
MDWL,<
.ADD(ALLWW,FOONLY,FOOWTV)
>;MDWL
;Note! These .ADD's must be outside of block structure
BEGIN FOONLY
COMMENT 
Foonly nomenclature old version (pre DRWVER=27)
DIPS BYTE(6) letter-code (12) number
CONNS BYTE(3) letter (3) [0,11,12,13,21,22,23,0] (12) number
New version, (changed by LOCFUK routine)
DIPS BYTE(3) letter (3) group (3) row (3) col (6) offset
CONNS BYTE(3) letter (3) [0,11,12,13,21,22,23,0] (12) number
The Foonly board is a 1320 DIP panel.
There are 8 major rows of dips, labeled A-F, vertically
Each row consists of 6 groups of 30 dips (except group 6
is only 15 DIPs) arranged horizontally within row.
A6 A5 A4 A3 A2 A1 conns
B6 B5 B4 B3 B2 B1 conns
C6 C5 C4 C3 C2 C1 conns
D6 D5 D4 D3 D2 D1 conns
E6 E5 E4 E3 E2 E1 conns
F6 F5 F4 F3 F2 F1 conns
H6 H5 H4 H3 H2 H1 conns
J6 J5 J4 J3 J2 J1 conns
The group is a 5 row by 6 columns, DIP 11 in upper right
16 15 14 13 12 11
26 21
36 31
46 41
56 55 54 53 52 51
All directions are viewed from the DIP side

%DIPL__<POINT 3,,20>-=18 ;DIP LETTER (A,B,C,D,E,F,H,J)
%DIPG__<POINT 3,,23>-=18 ;DIP GROUP (1-6)
%DIPR__<POINT 3,,26>-=18 ;DIP ROW (1-5)
%DIPC__<POINT 3,,29>-=18 ;DIP COL
%DIPOF__<POINT 6,,35>-=18 ;DIP OFFSET
%CONL__<POINT 3,,20>-=18 ;CONNECTOR LETTER
%CONN__<POINT 3,,23>-=18 ;CONNECTOR NUMBER (11,12,13,21,22,23)
%CONP__<POINT 9,,35>-=18 ;CONNECTOR PIN #
BRDGND__=1 ; PIN 1 IS DEDICATED GROUND
BRDPWR__=8 ; PIN 16 IS DEDICATED POWER
CONTAB: 0
=11
=12
=13
=21
=22
=23
0
MWL,<
comment 
All calculations are done from the DIP side.
(0,0) at LOWER left hand corner in left handed coordinate system.
X+ to right, Y+ is up
0,0 corresponds to FV1 of DEC connectors.

XPINSP__ =300
YPINSP__=100
>;MWL
;THE TRANSFER VECTOR FOR THE AUGUAT FOONLY
^FOOTV:
JRST LCINIT ;BOARD INITIALIZATION
JRST QUPIN ;CHECKS FOR WILD CONNECTOR BODIES
JRST $SLTOUT ;PRINTS CARD LOC (B-R-S)
JRST $GETSLT ;READS CARD LOC (B-R-S)
JRST PRNLOC ;PRINTS SOCKET, DIP, OR CONNECTOR LOC
JRST PRNPIN ;PRINTS SOCKET, DIP, OR CONNECTOR PIN
JRST CPNSEP ;SEPARATE CONNECTORS LOC/PIN PARTS FROM 18 BIT FORM
JRST CPNMER ;MERGE CONN LOC/PIN PARTS BACK
JRST CPNMAP ;MAP CARD LOC, CPIN-LOC INTO BACKPANEL PIN LOC
MDWL,< JRST MAPOST > ;CONVERT FROM DIP-LOC/PIN TO POST
MDPC,<
JRST GTSLTL ;READS (B-R-S) AND BODY LOCN
MD,< JRST GTCONP ;READS (B-R-S) AND CONNECTOR PIN
JRST locfuk ;LOCFUK
>;MD
>;MDPC
MWL,<
JRST GETLOC ;READS EITHER DIP LOC, OR CONNECTOR LOC
JRST RAYDIP ;PRINTS DIP, OR CONNECTOR LOC IN FORTRAN FORM
JRST CPARTP ; (PRINT EDGE PIN TO PARTITION FILE)
JRST SEQLOC ;TESTS FOR BODY LOCS BEING SEQUENTIAL
JRST CONGIN ;GENERATE NEXT INVENTED PIN TO REPLACE "U" PINS
JRST $GTSLTT ;GETSLT, BUT WITH FIRST CHAR IN CHRREG
>;MWL
[ASCIZ/L#/] ; CUE FOR BOARD SLOT
[ASCIZ /#/] ; CUE FOR BOARD PIN
MDPC,< [ASCIZ/LJ#-#/] ;CUE FOR CONNECTOR PIN
[ASCIZ/L# /] ;CUE FOR BODY LOC
[ASCID /A111/] ;PROTOTYPE FOR BODY LOC
>;MDPC
MWL,< [ASCIZ/L#/] ;WIRELISTER BODY CUE
[ASCIZ/LJ#/] ;WIRELISTER CONNECTOR BODY CUE
>;MWL
CHECK footv,LTVLEN
L2NSUB: BLOCK L2NLEN ;*******
N2LSUB: REPEAT N2LLEN, < "?"
>
EN2L__.
NNN__1
FOR I IN(A,B,C,D,E,F,H,J,K,L,M,N,P,R,S,T,U,V)
< L2N2L I,0
>
FOR I IN (G,I,O,Q)
< L2N2L I,1B0
>
N2LMAX__NNN-1
ORG EN2L
LCINIT: MOVE T,[L2NSUB,,L2N]
BLT T,L2N+L2NLEN+N2LLEN-1
MOVEI T,N2LMAX
MOVEM T,MAXN2L
POPJ P,
;Locfuk - convert from old blody location nomenclature.
MD,<
;T = LOCATION FOR BODY
;(TT= RDVER .LT. 27)
LOCFUK: CAIL TT,27 ;OLD VERSIONS HAVE DIFFERENT
POPJ P,
LDB TT,[POINT 6,T,23]
DPB TT,[%DIPL,,T]
MOVE TT,T
ANDI TT,7777 ;GET NUMBER, FORM OF "A156"
IDIVI TT,=10 ;STRIP OFF COL
PUSH P,TTT
IDIVI TT,=10
TRZ T,7777
DPB TT,[%DIPG,,T]
DPB TTT,[%DIPR,,T]
POP P,TT
DPB TT,[%DIPC,,T]
POPJ P,
>;MD
PRNLOC: SETZ TT,
JUMPE A,CPOPJ
JUMPL A,CNLOC
LDB T,[%DIPL,,A] ;GROUP LETTER
PUTBYT @N2L+1(T) ;CONVERT TO LETTER AND PRINT
LDB T,[%DIPG,,A]
PUTBYT "0"(T)
LDB T,[%DIPR,,A]
PUTBYT "0"(T)
LDB T,[%DIPC,,A]
PUTBYT "0"(T)
LDB T,[%DIPOF,,A]
JUMPE T,PRNLC1
PUTBYT "@"
PUSHJ P,PUTDEC
PRNLC1: MOVEI TT,"-"
POPJ P,
CNLOC: LDB T,[%CONL,,A]
PUTBYT @N2L+1(T)
PUTBYT "J"
LDB T,[%CONN,,A]
MOVE T,CONTAB(T)
MOVEI TT,2
MOVEM TT,NDIG
PUSHJ P,NPUTDEC
MOVEI TT,"-"
POPJ P,
PRNPIN: LDB T,[%%PINN,,A]
MWL,<
MOVEI TT,2
MOVEM TT,NDIG
JRST NPUTDEC
>;MWL
MDPC,< JRST PUTDEC >
;CONVERT PIN-SPEC TO POST-SPEC
;MAPOST (DWL) - CONVERT FROM DIP-LOC,PIN# TO SOCKET-LOC, PIN#
;A = MBIT+PIN#,,LOC
;B = PACKAGE
;Skips if can map, with MAPSOC set.
; Possibly MAPPWR or MAPGND if V or G posts on board
;A = New MBIT+PIN#,,LOC
;B = FLAGS,,PIN CHANGE
; %MPLOC ;LOC WAS CHANGED
; %MPPIN ;PIN WAS CHANGED, DIFFERENCE IN RH (TO CHECK FOR +1)
; %MPPL1 ;PIN NUMBER CHANGED BY 1 (KLUDGE)
MDWL,<
MAPOST: TLNN A,CRDPIN ;SHOULDN'T BE ON
TLOE A,MAPSOC
OUTSTR [ASCIZ /PIN ALREADY MAPPED TO POST???
/]
JUMPL A,[SETZ B, ;CONNECTOR, NO CHANGE
JRST CPOPJ1]
PUSH P,C
PUSH P,D
PUSH P,A
LDB D,[%DIPOF,,A] ;OFFSET FIELD WITHIN SOCKET
LDB A,[%%PINN,,A]
JUMPE A,MAPOS1
MOVEI C,=16 ;BOARD HAS 16 PIN SOCKETS
PUSHJ P,MAPPER
JRST MAPOSX
LDB T,[%DIPC,,(P)] ;NOW OFFSET COLUMN
SUB T,C
JUMPLE T,MAPOSX ;OVERFLOWS GROUP
DPB T,[%DIPC,,(P)]
LDB T,[%DIPR,,(P)] ;FIRST ROW IS 1
ADD T,D ;DOES OFFSET OVERFLOW NO. OF ROWS?
CAILE T,=6
JRST MAPOSX
DPB T,[%DIPR,,(P)]
MAPOS1: SETZ T,
DPB T,[%DIPOF,,(P)] ;WITHIN SOCKET OFFSET GOES AWAY
DPB A,[%%PINN,,(P)]
AOS -3(P)
MAPOSX: POP P,A
POP P,D
POP P,C
POPJ P,
>;MDWL
GTSLTL: PUSH P,A
MOVEI A,[[ASCIZ /L#./]
0]
PUSHJ P,LNPARS
JRST GTSL0
JRST GTSL1
SETZ T,
PUSHJ P,GATLOC
JRST GTSL0
CAIE CHRREG,"@"
JRST GTSL2
PUSH P,T
GETNUM
MOVE TT,NUMREG
POP P,T
JUMPE TT,GTSL0
DPB TT,[%DIPOF,,T]
GTSL2: MOVEM T,DESTIN
AOS -1(P)
GTSL1: AOS -1(P)
GTSL0: POP P,A
POPJ P,
GATLOC: MOVE TT,ARG1
SOS TT
DPB TT,[%DIPL,,T]
MOVE TT,ARG2
IDIVI TT,=10
PUSH P,TTT
IDIVI TT,=10
DPB TT,[%DIPG,,T]
DPB TTT,[%DIPR,,T]
POP P,TT
DPB TT,[%DIPC,,T]
JRST CPOPJ1
MD,<
;THIS SHOULD PROBABLY TRY FOR B-R-S ALSO, BUT...?
GTCONP: PUSH P,A
MOVEI A,[[ASCIZ /LJ#-#/]
0]
PUSHJ P,LNPARSE
JRST GTCON0
JRST GTCON1 ;NULL INPUT
PUSHJ P,GATCON ;GET JACK OR PADDLE PART OF LOC
JRST GTCON0
MOVE A,ARG5
GTCON3: DPB A,[%CONP,,TT]
HRRZM TT,DESTIN
AOS -1(P)
GTCON1: AOS -1(P)
GTCON0: POP P,A
POPJ P,
>;MD
GATCON: SETZ TT,
SOS A,ARG1
DPB A,[%CONL,,TT] ;THE LETTER
MOVSI TTT,-8
MOVE T,ARG3 ;THE 11,12,13,...
CAME T,CONTAB(TTT)
AOBJN TTT,.-1
JUMPGE TTT,CPOPJ
DPB TTT,[%CONN,,TT]
TLO TT,MAPCON
JRST CPOPJ1
MWL,<
GETLOC: MOVEI A,[[ASCIZ /LJ#/] ;0 - Scotchflex connector
[ASCIZ /L#/] ;1 - Board socket
[ASCIZ /L#@#/] ;2 - Board socket with offset
0]
PUSHJ P,LNPARSE
POPJ P,
POPJ P,
SKIPN A ;STRING 0,3 ARE CONNECTOR FORMATS
JRST GATCON
SETZ TT,
MOVE T,ARG4
CAIN A,2 ;THE OFFSET CASE
DPB T,[%DIPOF,,TT]
JRST GATLOC
;Print location for fixed format card image
;8 cols wide, with "group" left justified, "pin number" right justified
RAYDIP: TLNN A,MAPSOC
PUSHJ P,FUCKUP
PUSHJ P,PRNLOC ;A01 or J01 or C
LDB T,[%%PINN,,A] ;DIP PIN NUMBER
PUTSTR [ASCIZ / /] ;3 SPACES
MOVEI TTT,2
MOVEM TTT,NDIG
JRST NPUTDEC ;"A01" + 3 spaces + ## = 8
FOR NAME IN (CPARTP:,CONGIN:,SEQLOC:)
<NOTYET(NAME)
>
>;MWL
CPNSEP: LDB TT,[%CONP,,T]
MOVEI TTT,0
DPB TTT,[%CONP,,T]
POPJ P,
;Merge connector'pin with connector'loc
; but check for overflow of connector pin,
; and carry into next connector loc - this
; is used by the UML printer
CPNMER: PUSH P,A
SKIPN T ;INITIALIZE?
SKIPE TT
JRST CPNMR1
MOVEI TT,1 ;J11 AND PIN 1
DPB TT,[%CONN,,T] ;CONNECTOR TYPE STARTS AT ZERO
CPNMR1: LDB TTT,[%CONP,,T]
CAIG TT,=20
JRST CPNMR2
;Carry into the next connector
MOVEI TT,1 ;RESET PIN#
LDB TTT,[%CONN,,T]
AOS TTT
DPB TTT,[%CONN,,T]
SKIPE CONTAB(TTT) ;OVERFLOWS GROUP?
JRST CPNMR2
;Overflows from one major row to next
MOVEI TTT,1 ;RESET TO J11
DPB TTT,[%CONN,,T]
LDB TTT,[%CONL,,T]
AOS TTT
DPB TTT,[%CONL,,T]
CPNMR2: DPB TT,[%CONP,,T]
POP P,A
POPJ P,
QUPIN: SETZ A, ;NO RULE NUMBER
POPJ P, ;AND IT'S NOT WILD
NOTYET(CPNMAP:)
MDWL,<
MWL,<
SUBTTL WIRE WRAP ROUTINES -- FOONLY BOARDS
^^FOOWTV__.
-1 ;FLAGS IF WIRE WRAP OR PC BOARD
JRST CPOPJ ;THE INIT ROUTINE
JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS
JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS
JRST DISTPP ;DISTANCE CALC ROUTINE
JRST FPWR ;FIND A POST WITH POWER
JRST FGND ;FIND A POST WITH GND
JRST MAPIT ;CONVERT POST INTO X,Y,BITS
JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE
JRST GNDCLR ;?
JRST WAGGND ;?
JRST GNDOUT ;?
JRST VCCOUT ;?
5*8 ;NROWS (USED FOR UML ONLY)
6*6 ;NCOLS (USED FOR UML ONLY)
6 ;NCLPRG (USED FOR UML ONLY)
5 ;NRWPRP (USED FOR UML ONLY)
=1560 ;DIPSLT_NROWS*NCOLS (USED FOR UML ONLY)
SETPAD(6*8) ;NPADS (USED FOR UML ONLY)
XWD -=20,1 ;PADLET (USED FOR UML ONLY)
XWD -1,0 ;PADPIN (USED FOR UML ONLY)
=10 ;FRACTN
=200*2 ;WRAPMG .200" INSULATION AROUND EACH POST
=1500 ;POSTMG .750" BARE WIRE AROUND EACH POST
0 ;NEXTR
CHECK FOOWTV,WTVLEN
;TABLES FOR MAPIT
;**************************************** DIP PINS
DEFINE XY(X,Y)
< X*XPINSP,,Y*YPINSP
>
;Pin position offset from socket origin (pin 10, lower left). DIP side!
PINTAB:
FOR Y_7, 0, -1
< XY(0,Y)
>
FOR Y_0, 7, 1
< XY(1,Y)
>
MAPIT: JUMPL A,CONMAP ;MAP CONNECTOR LOCATION
PUSHJ P,MAPLOC ;MAP DIP LOCN
POPJ P, ;BAD LOCN
LDB TTT,[%%PINN,,A] ;PIN #
MAPIT0: ADD T,PINTAB-1(TTT) ;ADD EXTRA XY FOR PIN
SETZ TT,
CAIN TTT,BRDGND
MOVSI TT,GND
CAIN TTT,BRDPWR
MOVE TT,[PWR,,-=520] ;-5.20 VOLTS
SETZ TTT, ;FLUSH AWAY THOSE GOODIES
JRST CPOPJ1
;Convert PIN-SPEC in A into DIP X,Y locn (T)
;Y + UP
;X + RIGHT (FROM DIP SIDE)
;For Y, <6-major row>*6" + <5-ROW>*1.0"
MAPLOC: LDB T,[%DIPL,,A]
MOVNS T
ADDI T,6
IMULI T,=6000
LDB TT,[%DIPR,,A]
MOVNS TT
ADDI TT,5
IMULI TT,=1000
ADD T,TT
;For X, <6-Group>*3.0" + <6-Column>*.5"
LDB TT,[%DIPG,,A]
MOVNS TT
ADDI TT,6
IMULI TT,=3000
LDB TTT,[%DIPC,,A]
MOVNS TTT
ADDI TTT,6
IMULI TTT,=500
ADD TT,TTT
HRL T,TT
JRST CPOPJ1
;HERE FOR CONNECTOR PINS
;For Y, <6-major row>*6" + <2-JNx>*3.0" + <20-conp> *.1"
;For X, 20.0" + <3-JxN>*.5"
CONMAP: LDB T,[%CONL,,A]
MOVNS T
ADDI T,6
IMULI T,=6000
LDB TT,[%CONN,,A]
ADD T,CONTBL(TT)
LDB TT,[%CONP,,A]
MOVNS TT
ADDI TT,=20
ADD T,TT
JRST CPOPJ1
CONTBL: 0
=21500,,=4000
=21000,,=4000
=20500,,=4000
=21500,,=2000
=21000,,=2000
=20500,,=2000
0
PAKSIZ: SKIPE ILLPAK(B)
POPJ P,
LDB T,[%DIPC,,A]
SUB T,PAKWID(B)
JUMPL T,CPOPJ
LDB T,[%DIPR,,A]
ADD T,PAKHGT(B)
CAILE T,5
POPJ P,
JRST PAKDIM
;Define illegal package types in this board
; -1 if illegal
ILLPAK: BLOCK NPACK
FOR @' I IN (22,24,36,40,48,64)
<ORG ILLPAK+K.'I  -1
>
ORG ILLPAK+NPACK
;For UML, MAP a UML row, column into a diploc
MAPRC: HLRZ TT,T ;ROW
HRRZS T ;COL
PUSH P,[0]
PUSH P,TT ;THE ROW
SOS T
IDIVI T,6
ADDI TT,1
DPB TT,[%DIPC,,-1(P)]
ADDI T,1
DPB T,[%DIPG,,-1(P)]
POP P,T
SOS T
IDIVI T,5
AOS TT
DPB TT,[%DIPR,,(P)]
DPB T,[%DIPL,,(P)]
POP P,T
JRST CPOPJ1
;Map a connector number (T) and pin number (tt,ttt) into
; a connector spec
MAPPAD: MOVSI TTT,MAPCON(TT)
SOS T
IDIVI T,6 ;6 CONNECTORS PER MAJOR ROW
DPB T,[%CONL,,TTT]
AOS TT
DPB TT,[%CONN,,TTT]
MOVE T,TTT
POPJ P,
FPWR: SKIPA B,[BRDPWR]
FGND: MOVEI B,BRDGND
DPB B,[%%PINN,,A]
TLO A,MAPSOC
JUMPL A,FGNDC
POPJ P,
FGNDC: SETZ A, ;NOT CLEVER FOR NOW
POPJ P,
FOR NAME IN (GNDCLR:,WAGGND:,GNDOUT:,VCCOUT:)
<NOTYET(NAME)
>
>;MWL
>;MDWL
BEND FOONLY

1084
src/wl/lg627.439 Normal file

File diff suppressed because it is too large Load Diff

1142
src/wl/lg684.517 Normal file

File diff suppressed because it is too large Load Diff

685
src/wl/mpg21.502 Normal file
View File

@@ -0,0 +1,685 @@
;<WIRELIST>MPG21.FAI.9, 15-NOV-75 19:03:46, EDIT BY HELLIWELL
.ADD(ALLLOCS,MPG21,LMP21V)
.ADD(ALLLOCS,PG21,LMP21V)
MDWL,<
.ADD(ALLWW,MPG21,MP21TV)
.ADD(ALLWW,PG21,MP21TV)
>;MDWL
;Note! These .ADD's must be outside of block structure
BEGIN MPG21
;THE TRANSFER VECTOR FOR THE AUGUAT 8136 PG21-180 BOARD
^LMP21V:
JRST LCINIT ;BOARD INITIALIZATION
JRST QUPIN ;CHECKS FOR WILD CONNECTOR BODIES
JRST $SLTOUT ;PRINTS CARD LOC (B-R-S)
JRST $GETSLT ;READS CARD LOC (B-R-S)
JRST PRNLOC ;PRINTS SOCKET, DIP, OR CONNECTOR LOC
JRST PRNPIN ;PRINTS SOCKET, DIP, OR CONNECTOR PIN
JRST CPNSEP ;SEPARATE CONNECTORS LOC/PIN PARTS FROM 18 BIT FORM
JRST CPNMER ;MERGE CONN LOC/PIN PARTS BACK
JRST CPNMAP ;MAP CARD LOC, CPIN-LOC INTO BACKPANEL PIN LOC
MDWL,< JRST MAPOST > ;CONVERT FROM DIP-LOC/PIN TO POST
MDPC,<
JRST GTSLTL ;READS (B-R-S) AND BODY LOCN
MD,<
JRST GTCONP ;READS (B-R-S) AND CONNECTOR PIN
JRST LOCFUK ;PATCHUP OLD VERSIONS
>;MD
>;MDPC
MWL,<
JRST GETLOC ;READS EITHER DIP LOC, OR CONNECTOR LOC
JRST RAYDIP ;PRINTS DIP, OR CONNECTOR LOC IN FORTRAN FORM
JRST CPARTP ; (PRINT EDGE PIN TO PARTITION FILE)
JRST SEQLOC ;TESTS FOR BODY LOCS BEING SEQUENTIAL
JRST CONGIN ;GENERATE NEXT INVENTED PIN TO REPLACE "U" PINS
JRST $GTSLTT ;GETSLT, BUT WITH FIRST CHAR IN CHRREG
JRST AUGDIP
>;MWL
[ASCIZ/ #LL#/] ;CUE FOR BOARD SLOT
[ASCIZ/ #/] ;CUE FOR BOARD PIN
MDPC,< [ASCIZ/ #LJ#-#/] ;CUE FOR CONNECTOR PIN
[ASCIZ/ #L#(@#)/] ;CUE FOR BODY LOC
[ASCID/1A01/] ;PROTOTYPE FOR BODY LOC
>;MDPC
MWL,< [ASCIZ/#L#(@#) or #LJ#/] ;WIRELISTER BODY CUE
[ASCIZ/#LJ#/] ;WIRELISTER CONNECTOR BODY CUE
>;MWL
CHECK LMP21V,LTVLEN
L2NSUB: BLOCK L2NLEN
N2LSUB: REPEAT N2LLEN, < "?"
>
EN2L__.
NNN__1
FOR I IN(A,B,C,D,E,F)
< L2N2L I,0
>
FOR I IN (G,I,O,Q)
< L2N2L I,1B0
>
N2LMAX__NNN-1
ORG EN2L
;SOME BYTE POINTERS FOR EXTRACTING FIELDS
%DIPPNL__<POINT 3,,20>-=18 ;PANEL NUMBER
%DIPG__<POINT 3,,23>-=18 ;DIP GROUP
%DIPS__<POINT 6,,29>-=18 ;DIP SLOT
%DIPOF__<POINT 6,,35>-=18 ;DIP OFFSET
;NOTE - Old format MPG21's have no offset, but the DIP slot was <POINT 12,,35>
%CONP__<POINT 12,,35>-=18 ;CONNECTOR PIN # (AND JACK NUMBER <PINS 1-2*26>)
%CNPG__<POINT 5,,22>-=18 ;<PANEL-1>*NGRPS+GROUP
%CNJK__<POINT 1,,23>-=18 ;CONNECTOR JACK BIT
MXPNL__5 ;max number of panels wrappable at once
NGRPS__6 ;PG21-180 HAS 6 GROUPS
GRPCOL__5 ;# COLS IN GROUP
GRPROW__6 ;# ROWS IN GROUP
MAXDIP__GRPROW*GRPCOL ;# DIPS IN GROUP
MAXCNP__=26
;The 8136-PG21 consists of 180 dip slots, organized into
;6 groups of 30 dips each.
;The groups are labeled A-F, with group A to left
;Withhin a group, slots are numbered:
; 5 4 3 2 1
; 10 9 .... 6
; 15 .... 11
; 20 .... 16
; 25 .... 21
; 30 .... 26
;(All coordinates are from DIP side, assuming Scotchflex conns
; are at the top)
COMMENT 
AUGAT-8136-PG21 CONNECTOR PIN FORMAT PRINTS AS #LJ#(#)
WHERE L IS THE GROUP. THE J IS LITERAL. THE FIRST DIGIT IS THE PANEL
AND THE SECOND IS THE JACK. PIN IS LAST
______|_____|_____|_____|_____|_____|
| 2223 35
| 5 |1| 12 |
|_____ ___|_|_______________________|
| | |
< | | |------------>PIN
| |
< | |------------------------->JACK 01, 12
|
< |-------------------------------># <PANEL-1>*NGRPS+GROUP

;VARIOUS FIXUP ROUTINES
MD,<
;T = LOCATION FOR BODY
;(TT= RDVER .LT. 27)
LOCFUK: CAIL TT,27 ;OLD VERSIONS HAVE DIFFERENT
POPJ P,
MOVE TT,NOMTYP ;GAD, THIS IS BLETCHEROUS
CAIN TT,PGNOM
JRST [ MOVEI TT,1 ;PATCH UP PG21'S TO LOOK LIKE 1 OF MPG21
DPB TT,[%DIPPNL,,T]
JRST .+1]
LDB TT,[POINT 12,T,35] ;CONVERT MPG21'S LOC TO LOC/OFFSET
DPB TT,[%DIPS,,T]
SETZ TT,
DPB TT,[%DIPOF,,T]
POPJ P,
>;MD
LCINIT: MOVE T,[L2NSUB,,L2N]
BLT T,L2N+L2NLEN+N2LLEN-1
MOVEI T,N2LMAX
MOVEM T,MAXN2L
POPJ P,
PRNLOC: JUMPL A,CNLOC
LDB TT,[%DIPG,,A]
LDB T,[%DIPPNL,,A] ;PANEL NUMBER
IOR TT,T
JUMPE TT,CPOPJ ;BOTH BANEL AND GROUP NULL?
PUSHJ P,PUTDEC ;PANEL #
LDB T,[%DIPG,,A] ;GROUP LETTER
PUTBYT @N2L(T) ;CONVERT TO LETTER AND PRINT
MOVEI T,2 ;SETUP FOR 2 DIGIT NUMBER PRINT
MOVEM T,NDIG
LDB T,[%DIPS,,A] ;SLOT NUMBER WITHIN GROUP
PUSHJ P,NPUTDEC ;PRINT IT OUT
MOVEI T,2 ;SETUP FOR 2 DIGIT NUMBER PRINT
MOVEM T,NDIG
LDB T,[%DIPOF,,A] ;ANY SLOT OFFSET?
JUMPE T,PRNLC1
PUTBYT "@"
MWL,< PUSHJ P,NPUTDEC >
MDPC,< PUSHJ P,PUTDEC >
PRNLC1: MOVEI TT,"-"
POPJ P,
CNLOC: LDB T,[%CNPG,,A]
JUMPE T,CPOPJ
PUSH P,T+1
SOS T
IDIVI T,NGRPS
AOS T+1
EXCH T+1,(P)
AOS T
PUSHJ P,PUTDEC ;PANEL NUMBER
POP P,T
PUTBYT @N2L(T) ;GROUP LETTER
PUTBYT "J"
LDB T,[%CNJK,,A]
AOS T
PUSHJ P,PUTDEC
MOVEI TT,"-"
POPJ P,
PRNPIN: TLNE A,MAPPWR!MAPGND
JRST [ MOVEI T,"G"
TLNN A,MAPGND
MOVEI T,"V"
PUTBYT (T)
POPJ P,]
LDB T,[%%PINN,,A]
MWL,< MOVEI TT,2
MOVEM TT,NDIG
JRST NPUTDEC
>
MDPC,< JRST PUTDEC >
;CONVERT PIN-SPEC TO POST-SPEC
;MAPOST (DWL) - CONVERT FROM DIP-LOC,PIN# TO SOCKET-LOC, PIN#
;A = MBIT+PIN#,,LOC
;B = PACKAGE
;Skips if can map, with MAPSOC set.
; Possibly MAPPWR or MAPGND if V or G posts on board
;A = New MBIT+PIN#,,LOC
;B = FLAGS,,PIN CHANGE
; %MPLOC ;LOC WAS CHANGED
; %MPPIN ;PIN WAS CHANGED, DIFFERENCE IN RH (TO CHECK FOR +1)
; %MPPL1 ;PIN NUMBER CHANGED BY 1 (KLUDGE)
MDWL,<
MAPOST: TLNN A,CRDPIN ;SHOULDN'T BE ON
TLOE A,MAPSOC
OUTSTR [ASCIZ /PIN ALREADY MAPPED TO POST???
/]
JUMPL A,[SETZ B, ;CONNECTOR, NO CHANGE
JRST CPOPJ1]
PUSH P,C
PUSH P,D
PUSH P,A
LDB D,[%DIPOF,,A] ;OFFSET FIELD WITHIN SOCKET
LDB A,[%%PINN,,A]
JUMPE A,MAPOS1
MOVEI C,=16 ;BOARD HAS 16 PIN SOCKETS
PUSHJ P,MAPPER
JRST MAPOSX
LDB T,[%DIPS,,(P)] ;NOW OFFSET SLOT
MOVEI TT,-1(T)
IDIVI TT,GRPCOL ;TTT GETS COL WITHIN ROW, TT ROW
SUB TTT,C ;DOES OFFSET OVERFLOW GROUP?
SKIPL TTT
CAIL TTT,GRPCOL
JRST MAPOSX
SUB T,C ;Column offset
ADD TT,D ;DOES OFFSET OVERFLOW GROUP?
CAIL TT,GRPROW
JRST MAPOSX
IMULI D,GRPCOL
ADD T,D
DPB T,[%DIPS,,(P)]
MAPOS1: SETZ T,
DPB T,[%DIPOF,,(P)] ;WITHIN SOCKET OFFSET GOES AWAY
DPB A,[%%PINN,,(P)]
AOS -3(P)
MAPOSX: POP P,A
POP P,D
POP P,C
POPJ P,
>;MDWL
GTSLTL: SETZM DESTIN
GETNUM ;GET PANEL NUMBER
CAILE NUMREG,MXPNL ;MAX PANELS IN ONE ASSEMBLY
POPJ P,
DPB NUMREG,[%DIPPNL,,DESTIN] ;STORE AS PANEL NUMBER
CAIN CHRREG,12 ;END OF LINE?
JUMPE NUMREG,CPOPJ1 ;YES, AND NULL NUMBER, JUST RETURN
JUMPE NUMREG,CPOPJ ;OTHERWISE ZERO IS IN ERROR
PUSHJ P,CHKLET ;LETTER TYPED NEXT?
POPJ P, ;NO, ERROR
SKIPG D,L2N(CHRREG) ;GET NUMBER CORRESPONDING TO LETTER
POPJ P, ;NON-EX OR GIOQ!!
CAILE D,NGRPS ;LEGAL GROUP LETTER?
POPJ P,
DPB D,[%DIPG,,DESTIN] ;DEPOSIT AS GROUP LETTER
GETNUM ;GET NEXT NUMBER
JUMPE NUMREG,CPOPJ ;ZERO, ERROR
CAILE NUMREG,=30 ;EXCEEDS MAX SLOT NUMBER WITHIN GROUP?
POPJ P, ;YES
DPB NUMREG,[%DIPS,,DESTIN] ;DEPOSIT AS SLOT NUMBER
CAIE CHRREG,"@" ;ANY SLOT OFFSET?
JRST CPOPJ2 ;RETURN HAPPINESS
GETNUM
DPB NUMREG,[%DIPOF,,DESTIN]
JRST CPOPJ2
MD,<
GTCONP: SETZM DESTIN
GETNUM
LAY,< CAIE CHRREG,TEXIST >
CAIN CHRREG,12
JUMPE NUMREG,CPOPJ1 ;CARRIAGE RETURN ONLY
JUMPE NUMREG,CPOPJ ;ERROR IF NO NUMBER
CAILE NUMREG,MXPNL ;MAX PANELS
POPJ P, ;ERROR OTHERWISE
SOS NUMREG
IMULI NUMREG,NGRPS
MOVEM NUMREG,DESTIN
PUSHJ P,CHKLET ;CHECK FOR LETTER
POPJ P, ;BAD LETTER, ERROR
SKIPN CHRREG,L2N(CHRREG)
POPJ P,
ADD CHRREG,DESTIN
SETZM DESTIN
DPB CHRREG,[POINT 5,DESTIN,22]
GETNUM
JUMPN NUMREG,CPOPJ ;BETTER NOT BE A NUMBER HERE
CAIE CHRREG,"J" ;AND LETTER BETTER BE J
POPJ P,
GETNUM
JUMPE NUMREG,CPOPJ ;BETTER BE A NUMBER HERE
CAIN CHRREG,"-" ;TERMINATED BY A -
CAILE NUMREG,2 ;AND LESS THAN OR EQUAL TO 2
POPJ P,
SOS NUMREG
DPB NUMREG,[POINT 1,DESTIN,23] ;TEMP STORAGE FOR CONNECTOR NUMBER
GETNUM
JUMPE NUMREG,CPOPJ ;BETTER BE A NON ZERO NUMBER
CAILE NUMREG,MAXCNP ;LESS THAN 27
POPJ P,
DPB NUMREG,[POINT 12,DESTIN,35]
CAIE CHRREG,12 ;TERMINATION HAD BETTER BE HERE AND EOL
POPJ P,
JRST CPOPJ2 ;ALL'S WELL THAT ENDS WELL
>;MD
MWL,<
GETLOC: GETNUM
JUMPE NUMREG,CPOPJ ;NON ZERO NUMBER
CAILE NUMREG,MXPNL ;PANEL # MAX
POPJ P,
LSH NUMREG,=15 ;INTO LEFT 3 BITS OF RIGHT HALF
HRLM NUMREG,(P) ;INTO LH OF PDL
PUSHJ P,CHKLET
POPJ P, ;NOT A LETTER
SKIPN CHRREG,L2N(CHRREG)
POPJ P,
DPB CHRREG,[POINT 3,(P),5] ;DEPOSIT GROUP LETTER INTO LH OF PDL
GETNUM
JUMPN NUMREG,[ CAILE NUMREG,=30 ;HERE FOR DIP LOC
POPJ P, ;ONLY 30 DIP SLOTS PER GROUP
HLRZ TT,(P)
DPB NUMREG,[%DIPS,,TT]
CAIE CHRREG,"@"
JRST CPOPJ1
HRLM TT,(P)
GETNUM
HLRZ TT,(P)
DPB NUMREG,[%DIPOF,,TT]
JRST CPOPJ1]
LDB NUMREG,[POINT 3,(P),2]
SOS NUMREG
IMULI NUMREG,NGRPS
LDB TT,[POINT 3,(P),5]
ADD NUMREG,TT
DPB NUMREG,[POINT 5,(P),4]
PUSHJ P,CHKLET ;HERE TO DO CONNECTOR PIN
POPJ P,
CAIE CHRREG,"J"
POPJ P,
GETNUM
JUMPE NUMREG,CPOPJ
CAILE NUMREG,2 ;CHECK FOR LEGAL JACK #
POPJ P,
SOS NUMREG
DPB NUMREG,[POINT 1,(P),5] ;DEPOSIT CONNECTOR NUMBER INTO RH OF LH OF PDL
HLRZ TT,(P)
TRZ TT,7777
TLO TT,MAPCON ;SIGNAL AS CONNECTOR
JRST CPOPJ1
RAYDIP: TLNN A,MAPSOC
PUSHJ P,FUCKUP
PUSHJ P,PRNLOC
PUTSTR [ASCIZ / /] ;3 SPACES
TLNE A,MAPPWR!MAPGND
JRST RAYDP1
LDB T,[%%PINN,,A] ;DIP PIN NUMBER
MOVEI TTT,2
MOVEM TTT,NDIG
JRST NPUTDEC
RAYDP1: PUTBYT "0"
MOVEI T,"G"
TLNN A,MAPGND
MOVEI T,"V"
PUTBYT (T)
POPJ P,
NOTYET(AUGDIP:,CPARTP:,CPARTP:,SEQLOC:)
>;MWL
CPNSEP: MOVE TT,T
TRZ T,7777
ANDI TT,7777
POPJ P,
CPNMER: SKIPN T
SKIPE TT
CAIA
MOVEI TT,1 ;T,TT=0 MEANS INITIALIZE TO FIRST
CAILE TT,MAXCNP ;CARRY INTO JACK, FROM PIN#
JRST [ ADDI T,10000
MOVEI TT,1
JRST .+1]
DPB TT,[001200,,T]
POPJ P,
QUPIN: SETZ A, ;NO RULE NUMBER
POPJ P, ;AND IT'S NOT WILD!!
NOTYET(CPNMAP:)
MDWL,<
MWL,<
SUBTTL WIRE WRAP ROUTINES -- MULTIPLE PG21'S
comment 
All calculations are done from the dip side.
(0,0) at lower left hand corner in left handed coordinate system.
Dip sockets are arranged in 5x6 groups. These 30 dip groups come
in pairs. Each group comes with a pair of Scotch Flex(R) connectors
labeled "J1" and "J2". There can be up to 6 30 dip groups on one
board. The horizontal spacing between groups is 2.700".
There are 5 panels, vertically arranged. The vertical spacing
is 7.500".
5A30(8) is at (0,0). 5AJ2-26 is at (500,6100). 5AJ1-26 is at (500,6400).
It follows that 5B30(8) is at (2700,0)

UMLCOL__GRPROW ;UML INTERCHANGES ROWS AND COLUMNS
UMLROW__GRPCOL
PNLOFT__=7500 ;7.500" VERTICAL SPACING BETWEEN PANELS
GXOFST__=2700 ;2.700" GROUP HORIZONTAL SPACING
XDIPSP__ =500 ; .500" DIP HORIZONTAL SPACING
YDIPSP__=1000 ;1.000" DIP VERTICAL SPACING
XPINSP__ =300 ; .300" DIP PIN HORIZONTAL SPACING
YPINSP__ =100 ; .100" DIP PIN VERTICAL SPACING
PXOFST__ =300 ; .300" X OFFSET FOR POWER PIN
PYOFST__ =800 ; .800" Y OFFSET FOR POWER AND GROUND PINS
JXOFST__ =500 ; .500" X OFFSET FOR JACKS
JYOFST__=6100 ;6.100" Y OFFSET FOR J2
JYOFS1__ =300 ; .300" Y OFFSET FROM J2 TO J1
PXPNSP__ =100 ; .100" CONNECTOR PIN VERTICAL SPACING
PYPNSP__ =100 ; .100" CONNECTOR PIN HORIZONTAL SPACING
^^MP21TV__. ;TRANSFER VECTOR FOR DOUBLE HEIGHT DEC BOARDS
-1 ;FLAGS IF WIRE WRAP OR PC BOARD
JRST CPOPJ ;THE INIT ROUTINE
JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS
JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS
JRST DISTPP ;DISTANCE CALC ROUTINE
JRST FPWR ;FIND A POST WITH POWER
JRST FGND ;FIND A POST WITH GND
JRST MAPIT ;CONVERT POST INTO X,Y,BITS
JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE
JRST GNDCLR ;?
JRST WAGGND ;?
JRST GNDOUT ;?
JRST VCCOUT ;?
MXPNL*UMLROW*NGRPS ;NROWS (USED FOR UML ONLY)
UMLCOL ;NCOLS (USED FOR UML ONLY)
UMLCOL ;NCLPRG (USED FOR UML ONLY)
UMLROW*2 ;NRWPRP (USED FOR UML ONLY)
MXPNL*MAXDIP*NGRPS ;DIPSLT_NROWS*NCOLS (USED FOR UML ONLY)
SETPAD(MXPNL*NGRPS*2) ;NPADS (USED FOR UML ONLY)
XWD -MAXCNP,1 ;PADLET (USED FOR UML ONLY)
XWD -1,0 ;PADPIN (USED FOR UML ONLY)
=10 ;FRACTN
=200*2 ;WRAPMG .200" INSULATION AROUND EACH POST
=1500 ;POSTMG .750" BARE WIRE AROUND EACH POST
0 ;NEXTR
CHECK MP21TV,WTVLEN
;TABLES FOR MAPIT
;**************************************** DIP PINS
DEFINE XY(X,Y)
< X*XPINSP,,Y*YPINSP
>
PINTAB:
FOR Y_7, 0, -1
< XY(1,Y)
>
FOR Y_0, 7, 1
< XY(0,Y)
>
;**************************************** DIP LOCATIONS
DEFINE XY(X,Y)
< X*XDIPSP,,Y*YDIPSP
>
DIPLOC:
FOR Y_5, 0, -1
<FOR X_4, 0, -1
< XY(X,Y)
>>
;**************************************** SCOTCH-FLEX PINS
DEFINE XY(X,Y)
< X*PXPNSP,,Y*PYPNSP
>
FLXPIN:
FOR Y_1, 0, -1
<FOR X_0, =12, 1
< XY(X,Y)
>>
MAPIT: JUMPL A,CONMAP
PUSHJ P,MAPLOC ;MAP DIP LOCN
POPJ P, ;BAD LOCN
LDB TT,[%%PINN,,A] ;PIN #
TLNE A,MAPPWR!MAPGND ;WANT POWER OR GROUND?
JRST PINPGP ;YES, RETURN FIX IT UP
MAPIT0: ADD T,PINTAB-1(TT) ;ADD EXTRA XY FOR PIN
SETZB TT,TTT ;FLUSH AWAY THOSE GOODIES
JRST CPOPJ1
;POWER AND GROUND PIN FOR DIP
PINPGP: JUMPN TT,CPOPJ ;THE PIN # SHOULD BE ZERO
ADDI T,PYOFST ;FIX THE Y
TLNN A,MAPPWR
JRST [ MOVSI TT,GND ;HE WANTS GND
JRST PINPG1]
ADD T,[PXOFST,,0] ;HE WANTS PWR
MOVSI TT,PWR
PINPG1: SETZ TTT,
JRST CPOPJ1
;Convert PIN-SPEC in A into DIP X,Y locn (T)
MAPLOC: LDB TTT,[%DIPPNL,,A] ;GET PANEL NUMBER
JUMPE TTT,CPOPJ ;LOSER
MOVEI TT,MXPNL ;MAX NUMBER OF PANELS
CAILE TTT,MXPNL ;TOO BIG
POPJ P,
SUBM TT,TTT
IMULI TTT,PNLOFT ;VERTICAL OFFSET OF PANEL
LDB TT,[%DIPG,,A] ;GROUP LETTER
LDB T,[%DIPS,,A] ;DIP #
JUMPE T,CPOPJ
CAILE T,MAXDIP ;TOO MANY DIPS FOR SLOT
POPJ P,
MOVE T,DIPLOC-1(T) ;XY OF DIP SLOT
IMULI TT,GXOFST ;X FUDGE FOR GROUP
MOVSI TT,-GXOFST(TT)
ADD T,TT ;LOCATION OF DIP ON BOARD
ADD T,TTT ;ADD IN PANEL OFFSET
JRST CPOPJ1
;HERE FOR CONNECTOR PINS
CONMAP: LDB TT,[%CNPG,,A] ;PANEL AND GROUP NUMBER
JUMPE TT,CPOPJ ;ILLEGAL PANEL NO
PUSH P,TT+1
SOS TT
IDIVI TT,NGRPS
CAIL TT,MXPNL
JRST [ POP P,TT+1
POPJ P,] ;TOO BIG A PANEL NUMBER
MOVEI T,MXPNL-1
SUBM T,TT ;0 FOR PANEL <MXPNL>
IMULI TT,PNLOFT ;OFFSET BETWEEN PANELS
MOVE T,TT+1
POP P,TT+1
IMULI T,GXOFST
HRLZ T,T ;XY OF GROUP
ADD T,[JXOFST,,JYOFST] ;LOC OF J2
ADD T,TT ;ADD IN PANEL OFFSET
LDB TT,[%CNJK,,A]
SKIPG TT
ADDI T,JYOFS1 ;ADD OFFSET FOR JACK 1
LDB TT,[%%PINN,,A] ;PIN #
JUMPE TT,CPOPJ
CAILE TT,MAXCNP ;REASONABLE # OF PINS
POPJ P,
ADD T,FLXPIN-1(TT)
SETZB TT,TTT
JRST CPOPJ1
PAKSIZ: SKIPE ILLPAK(B) ;THIS PACKAGE KNOWN TO BOARD?
POPJ P,
LDB T,[%DIPS,,A] ;STARTING DIP SLOT
SOS T
IDIVI T,GRPCOL ;T  row with 0 on top, TT  column with 0 to right
SUB T,PAKHGT(B) ;Vertical extent-1
SUB TT,PAKWID(B) ;Horizontal extent-1
JUMPL T,CPOPJ
JUMPL TT,CPOPJ
CAIGE T,GRPROW
CAIL TT,GRPCOL ;MUST BE WITHIN GROUP HORIZONTALLY
POPJ P,
JRST PAKDIM ;GET PACKAGE DIMENSIONS
;Define illegal package types in this board
ILLPAK: BLOCK NPACK
FOR @' I IN (22,24,36,40,48,64)
<ORG ILLPAK+K.'I  -1
>
ORG ILLPAK+NPACK
MAPRC: HLRZ TT,T ;(1,1) IS DIP IN UPPER LEFT HAND CORNER
SOJL TT,CPOPJ
CAML TT,NROWS
POPJ P,
HRRZS T ;ROW IN TT, COL IN T
SOJL T,CPOPJ
CAML T,NCOLS ;(0,0) IS NOW IN UPPER LEFT
POPJ P,
PUSH P,[0]
IDIVI TT,NGRPS*GRPCOL ;BREAK INTO PANEL#,COL WITHIN PANEL
ADDI TT,1
DPB TT,[%DIPPNL,,(P)]
MOVE TT,TTT
IDIVI TT,GRPCOL ;BREAK INTO GROUP#,COL#
ADDI TT,1
DPB TT,[%DIPG,,(P)]
MOVNS T ;LAST UML COL CORRESPONDS TO FIRST DIP ROW
MOVEI T,UMLCOL-1(T)
IMULI T,UMLROW ;DIPSLOTS COUNT BY UMLROWS, THEN UMLCOLS
ADDI T,1(TTT)
DPB T,[%DIPS,,(P)]
POP P,T
JRST CPOPJ1
MAPPAD: MOVE TTT,T ;JACK #, STARTING AT 1
SETZ T,
CAIG TT,MAXCNP ;PIN #
CAILE TTT,<MXPNL>*NGRPS*2 ;2 JACKS PER GROUP
POPJ P,
SOS TTT
DPB TTT,[%CNJK,,T]
ASH TTT,-1
AOS TTT
DPB TTT,[%CNPG,,T]
DPB TT,[%%PINN,,T]
TLO T,MAPCON
POPJ P,
FPWR: CAIE B,=500 ;NOT +5.00V??
JRST [ SETZ A,
POPJ P,]
TLO A,MAPPWR!MAPSOC ;MAKE IT "V" PIN
JUMPL A,FPWRC ;CONNECTOR?
TLZ A,$$PINN
POPJ P,
FGND: TLO A,MAPGND!MAPSOC ;MAKE IT "G" PIN
JUMPL A,FGNDC
TLZ A,$$PINN
POPJ P,
FPWRC: ;FIND DIP SLOT CLOSEST TO CONN PIN
FGNDC: LDB T,[%CNPG,,A]
SOS T
IDIVI T,NGRPS
AOS T
AOS TT
TRZ A,-1
DPB T,[%DIPPNL,,A] ;GET THE RIGHT PANEL,GROUP
DPB TT,[%DIPG,,A]
LDB T,[%%PINN,,A]
SOS T
IDIVI T,=13
MOVE T,[ REPEAT 4,<2>
REPEAT 5,<3>
REPEAT 4,<4>](TT)
DPB T,[%DIPS,,A]
TLZ A,$$PINN
POPJ P,
FOR NAME (GNDCLR:,WAGGND:,GNDOUT:,VCCOUT:)
<NOTYET(NAME)
>
>;MWL
>;MDWL
BEND MPG21

714
src/wl/mpg216.502 Normal file
View File

@@ -0,0 +1,714 @@
;<WIRELIST>MPG216.FAI.9, 15-NOV-75 19:03:46, EDIT BY HELLIWELL
.ADD(ALLLOCS,MPG216,LM216V)
MDWL,<
.ADD(ALLWW,MPG216,M216TV)
>;MDWL
;Note! These .ADD's must be outside of block structure
BEGIN MPG216
;THE TRANSFER VECTOR FOR THE AUGAT 8136 PG216-180 BOARD
^LM216V:
JRST LCINIT ;BOARD INITIALIZATION
JRST QUPIN ;CHECKS FOR WILD CONNECTOR BODIES
JRST $SLTOUT ;PRINTS CARD LOC (B-R-S)
JRST $GETSLT ;READS CARD LOC (B-R-S)
JRST PRNLOC ;PRINTS SOCKET, DIP, OR CONNECTOR LOC
JRST PRNPIN ;PRINTS SOCKET, DIP, OR CONNECTOR PIN
JRST CPNSEP ;SEPARATE CONNECTORS LOC/PIN PARTS FROM 18 BIT FORM
JRST CPNMER ;MERGE CONN LOC/PIN PARTS BACK
JRST CPNMAP ;MAP CARD LOC, CPIN-LOC INTO BACKPANEL PIN LOC
MDWL,< JRST MAPOST > ;CONVERT FROM DIP-LOC/PIN TO POST
MDPC,<
JRST GTSLTL ;READS (B-R-S) AND BODY LOCN
MD,< JRST GTCONP ;READS (B-R-S) AND CONNECTOR PIN
JRST CPOPJ ;LOCFUK - FIXUP OLD NOMEN
>;MD
>;MDPC
MWL,<
JRST GETLOC ;READS EITHER DIP LOC, OR CONNECTOR LOC
JRST RAYDIP ;PRINTS DIP, OR CONNECTOR LOC IN FORTRAN FORM
JRST CPARTP ; (PRINT EDGE PIN TO PARTITION FILE)
JRST SEQLOC ;TESTS FOR BODY LOCS BEING SEQUENTIAL
JRST CONGIN ;GENERATE NEXT INVENTED PIN TO REPLACE "U" PINS
JRST $GTSLTT ;GETSLT, BUT WITH FIRST CHAR IN CHRREG
JRST AUGDIP
>;MWL
[ASCIZ/#LL#/] ; CUE FOR BOARD SLOT
[ASCIZ /#/] ; CUE FOR BOARD PIN
MDPC,< [ASCIZ/#LJ#-#/] ;CUE FOR CONNECTOR PIN
[ASCIZ/#L# /] ;CUE FOR BODY LOC
[ASCID /1A01/] ;PROTOTYPE FOR BODY LOC
>;MDPC
MWL,< [ASCIZ/#L#/] ;WIRELISTER BODY CUE
[ASCIZ/#LJ#/] ;WIRELISTER CONNECTOR BODY CUE
>;MWL
CHECK LM216V,LTVLEN
L2NSUB: BLOCK L2NLEN
N2LSUB: REPEAT N2LLEN, < "?"
>
EN2L__.
NNN__1
FOR I IN(A,B,C,D,E,F)
< L2N2L I,0
>
FOR I IN (G,I,O,Q)
< L2N2L I,1B0
>
N2LMAX__NNN-1
ORG EN2L
;SOME BYTE POINTERS FOR EXTRACTING FIELDS
%DIPPNL__<POINT 3,,20>-=18 ;PANEL NUMBER
%DIPG__<POINT 3,,23>-=18 ;DIP GROUP
%DIPS__<POINT 6,,29>-=18 ;DIP SLOT
%DIPOF__<POINT 6,,35>-=18 ;DIP OFFSET
%CNPPNL__<POINT 3,,20>-=18 ;PANEL NUMBER (MUST BE SAME AS DIP)
%CNPG__<POINT 3,,23>-=18 ;CONN GROUP ( " " )
%CNPJK__<POINT 1,,26>-=18 ;CONNECTOR JACK BIT
%CONP__<POINT 9,,35>-=18 ;CONNECTOR PIN # (AND JACK NUMBER <PINS 1-2*26>)
GPINS__400 ;NOMEN FOR "G" PINS ON BOARD STARTS AT 400
; 401 IS "G1", ETC.
MXPNL__5 ;max number of panels wrappable at once
NGRPS__6 ;PG216-180 HAS 6 GROUPS
GRPCOL__5 ;# COLS IN GROUP
GRPROW__6 ;# ROWS IN GROUP
GRPDIP__GRPROW*GRPCOL ;# DIPS IN GROUP
MXCNP1__=40 ;MAX # CONNECTOR PINS FOR J1
MXCNP2__=50 ;MAX # CONNECTOR PINS FOR J2
J1TO2__2 ;J1 IS OFFSET 2 PINS TO RIGHT OF J2
JACKSZ: MXCNP1
MXCNP2
;The 8136-PG216 consists of 180 dip slots, organized into
;6 groups of 30 dips each.
;The groups are labeled A-F, with group A to left
;Withhin a group, slots are numbered:
; 5 4 3 2 1
; 10 9 .... 6
; 15 .... 11
; 20 .... 16
; 25 .... 21
; 30 .... 26
;(All coordinates are from DIP side, assuming Scotchflex conns
; are at the top)
COMMENT 
AUGAT-X8136-PG216 CONNECTOR PIN FORMAT PRINTS AS #LJ#-#
WHERE L IS THE GROUP. THE J IS LITERAL. THE FIRST DIGIT IS THE PANEL
AND THE SECOND IS THE JACK. PIN IS LAST
______|_____|_____|_____|_____|_____|
| 20 23 26 35
| 3 | 3 | | | 9 |
|_____|_____|___|_|_________________|
| | | |
< | | | |------------>PIN
| | |
| | |-------------------JACK 01, 12
| |
< | |--------------------------># GROUP
|
< |-------------------------------># PANEL

LCINIT: MOVE T,[L2NSUB,,L2N]
BLT T,L2N+L2NLEN+N2LLEN-1
MOVEI T,N2LMAX
MOVEM T,MAXN2L
POPJ P,
PRNLOC: JUMPE A,CPOPJ
JUMPL A,CNLOC
LDB TT,[%DIPG,,A]
LDB T,[%DIPPNL,,A] ;PANEL NUMBER
IOR TT,T
JUMPE TT,CPOPJ ;BOTH BANEL AND GROUP NULL?
PUSHJ P,PUTDEC ;PANEL #
LDB T,[%DIPG,,A] ;GROUP LETTER
PUTBYT @N2L(T) ;CONVERT TO LETTER AND PRINT
MOVEI T,2 ;SETUP FOR 2 DIGIT NUMBER PRINT
MOVEM T,NDIG
LDB T,[%DIPS,,A] ;SLOT NUMBER WITHIN GROUP
PUSHJ P,NPUTDEC ;PRINT IT OUT
MOVEI T,2 ;SETUP FOR 2 DIGIT NUMBER PRINT
MOVEM T,NDIG
LDB T,[%DIPOF,,A] ;ANY SLOT OFFSET?
JUMPE T,PRNLC1
PUTBYT "@"
MWL,< PUSHJ P,NPUTDEC >
MDPC,< PUSHJ P,PUTDEC >
PRNLC1: MOVEI TT,"-"
POPJ P,
CNLOC: LDB T,[%CNPPNL,,A] ;PANEL NUMBER
PUSHJ P,PUTDEC ;PANEL #
LDB T,[%CNPG,,A] ;GROUP LETTER
PUTBYT @N2L(T) ;CONVERT TO LETTER AND PRINT
PUTBYT "J"
LDB T,[%CNPJK,,A]
AOS T
PUSHJ P,PUTDEC
MOVEI TT,"-"
POPJ P,
PRNPIN: LDB T,[%%PINN,,A]
JUMPL A,PRNPN1
CAIGE T,GPINS
JRST PRNPN1
SUBI T,GPINS
PUTBYT "G"
SKIPA TT,[1]
PRNPN1:
MWL,<
MOVEI TT,2
MOVEM TT,NDIG
JRST NPUTDEC
>;MWL
MDPC,< JRST PUTDEC
JRST PUTDEC >
;CONVERT PIN-SPEC TO POST-SPEC
;MAPOST (DWL) - CONVERT FROM DIP-LOC,PIN# TO SOCKET-LOC, PIN#
;A = MBIT+PIN#,,LOC
;B = PACKAGE
;Skips if can map, with MAPSOC set.
; Possibly MAPPWR or MAPGND if V or G posts on board
;A = New MBIT+PIN#,,LOC
;B = FLAGS,,PIN CHANGE
; %MPLOC ;LOC WAS CHANGED
; %MPPIN ;PIN WAS CHANGED, DIFFERENCE IN RH (TO CHECK FOR +1)
; %MPPL1 ;PIN NUMBER CHANGED BY 1 (KLUDGE)
MDWL,<
MAPOST: TLNN A,CRDPIN ;SHOULDN'T BE ON
TLOE A,MAPSOC
OUTSTR [ASCIZ /PIN ALREADY MAPPED TO POST???
/]
JUMPL A,[SETZ B, ;CONNECTOR, NO CHANGE
JRST CPOPJ1]
PUSH P,C
PUSH P,D
PUSH P,A
LDB D,[%DIPOF,,A] ;OFFSET FIELD WITHIN SOCKET
LDB A,[%%PINN,,A]
JUMPE A,MAPOS1
MOVEI C,=20 ;BOARD HAS 20 PIN SOCKETS
PUSHJ P,MAPPER
JRST MAPOSX
LDB T,[%DIPS,,(P)] ;NOW OFFSET SLOT
MOVEI TT,-1(T)
IDIVI TT,GRPCOL ;TTT GETS COL WITHIN ROW, TT ROW
;Slots are numbered right to left, so offset is subtracted
SUB TTT,C ;DOES OFFSET OVERFLOW GROUP?
CAIL TTT,GRPCOL
JRST MAPOSX
SUB T,C ;Column offset
ADD TT,D ;DOES OFFSET OVERFLOW GROUP?
CAIL TT,GRPROW
JRST MAPOSX
IMULI D,GRPCOL
ADD T,D
DPB T,[%DIPS,,(P)]
MAPOS1: SETZ T,
DPB T,[%DIPOF,,(P)] ;WITHIN SOCKET OFFSET GOES AWAY
DPB A,[%%PINN,,(P)]
AOS -3(P)
MAPOSX: POP P,A
POP P,D
POP P,C
POPJ P,
>;MDWL
GTSLTL: PUSH P,A
MOVEI A,[[ASCIZ /#L#./]
0]
PUSHJ P,LNPARS
JRST GTSL0
JRST GTSL1
SETZ TT,
PUSHJ P,GATLOC
JRST GTSL0
CAIE CHRREG,"@"
JRST GTSL2
PUSH P,TT
GETNUM
POP P,TT
JUMPE NUMREG,GTSL0
DPB NUMREG,[%DIPOF,,TT]
GTSL2: MOVEM TT,DESTIN
AOS -1(P)
GTSL1: AOS -1(P)
GTSL0: POP P,A
POPJ P,
GATLOC: SKIPE A,ARG1
CAILE A,MXPNL
POPJ P,
DPB A,[%DIPPNL,,TT]
SKIPE A,ARG2
CAILE A,NGRPS
POPJ P,
DPB A,[%DIPG,,TT]
SKIPE A,ARG3
CAILE A,GRPDIP
POPJ P,
DPB A,[%DIPS,,TT]
JRST CPOPJ1
MD,<
GTCONP: SETZM DESTIN
PUSH P,A
MOVEI A,[[ASCIZ /#LJ#-#/]
0]
PUSHJ P,LNPARS
JRST GTCON0
JRST GTCON1 ;NULL INPUT
PUSHJ P,GATCON
JRST GTCON0
MOVE A,ARG4
ADDI A,JACKSZ-1(A)
EXCH A,ARG6
CAMLE A,@ARG6
JRST GTCON0
DPB A,[%CONP,,TT]
HRRZM TT,DESTIN ;LH IS B-R-S, 0 FOR THIS BOARD
AOS -1(P)
GTCON1: AOS -1(P)
GTCON0: POP P,A
POPJ P,
>;MD
GATCON: SETZ TT,
SKIPE A,ARG1
CAILE A,MXPNL
POPJ P,
DPB A,[%CNPPNL,,TT]
SKIPE A,ARG2
CAILE A,NGRPS
POPJ P,
DPB A,[%CNPG,,TT]
SKIPE A,ARG4
CAILE A,2
POPJ P,
SOS A
DPB A,[%CNPJK,,TT]
TLO TT,MAPCON
JRST CPOPJ1
MWL,<
GETLOC: MOVEI A,[[ASCIZ /#L#/]
[ASCIZ /#L#@#/]
[ASCIZ /#LJ#/]
0]
PUSHJ P,LNPARSE
POPJ P,
POPJ P,
CAIN A,2
JRST GATCON
SETZ TT,
MOVE T,ARG5
CAIN A,1 ;THE OFFSET CASE
DPB T,[%DIPOF,,TT]
JRST GATLOC
RAYDIP: TLNN A,MAPSOC
PUSHJ P,FUCKUP
PUSHJ P,PRNLOC
LDB T,[%%PINN,,A] ;DIP PIN NUMBER
CAIL T,GPINS
JRST RAYDP1
PUTSTR [ASCIZ / /] ;3 SPACES
MOVEI TTT,2
MOVEM TTT,NDIG
JRST NPUTDEC
RAYDP1: SUBI T,GPINS
PUTSTR [ASCIZ / /] ;2 SPACES
CAIGE T,=10
PUTBYT 40
PUTBYT "G"
JRST PUTDEC
FOR NAME IN (AUGDIP:,CPARTP:,CONGIN:,SEQLOC:)
<NOTYET(NAME)
>
>;MWL
CPNSEP: LDB TT,[%CONP,,T]
MOVEI TTT,0
DPB TTT,[%CONP,,T]
POPJ P,
CPNMER: SKIPN T
SKIPE TT
JRST CPNMR1
MOVEI TT,1 ;T,TT=0 MEANS INITIALIZE TO FIRST
DPB TT,[%CNPG,,T] ;JACK STARTS OUT AT ZERO, NO INITIALIZATION
DPB TT,[%CNPPNL,,T]
CPNMR1: LDB TTT,[%CNPJK,,T]
CAMG TT,JACKSZ(TTT)
JRST CNPMR1
MOVEI TT,1 ;CARRY INTO JACK, FROM PIN#
AOS TTT
DPB TTT,[%CNPJK,,T]
CAIGE TTT,2
JRST CNPMR1
LDB TTT,[%CNPG,,T]
AOS TTT
DPB TTT,[%CNPG,,T]
CAIGE TTT,NGRPS
JRST CNPMR1
MOVEI TTT,1
DPB TTT,[%CNPG,,T]
LDB TTT,[%CNPPNL,,T]
AOS TTT
DPB TTT,[%CNPPNL,,T]
CNPMR1: DPB TT,[%CONP,,T]
POPJ P,
QUPIN: SETZ A, ;NO RULE NUMBER
POPJ P, ;AND IT'S NOT WILD
NOTYET(CPNMAP:)
MDWL,<
MWL,<
SUBTTL WIRE WRAP ROUTINES -- MULTIPLE PG216'S
comment 
All calculations are done from the dip side.
(0,0) at lower left hand corner in left handed coordinate system.
Dip sockets are arranged in 5x6 groups. These 30 dip groups come
in pairs. Each group comes with a pair of Scotch Flex(R) connectors
labeled "J1" and "J2". There can be up to 6 30 dip groups on one
board. The horizontal spacing between groups is 2.700".
There are 5 panels, vertically arranged. The vertical spacing
is 7.500".
5A30(8) is at (0,0). 5AJ2-26 is at (500,6100). 5AJ1-26 is at (500,6400).
It follows that 5B30(8) is at (2700,0)

UMLCOL__GRPROW ;UML INTERCHANGES ROWS AND COLUMNS
UMLROW__GRPCOL
PNLOFT__=8100 ;8.100" VERTICAL SPACING BETWEEN PANELS
GXOFST__=2700 ;2.700" GROUP HORIZONTAL SPACING
XDIPSP__ =500 ; .500" DIP HORIZONTAL SPACING
YDIPSP__=1100 ;1.100" DIP VERTICAL SPACING
XPINSP__ =300 ; .300" DIP PIN HORIZONTAL SPACING
YPINSP__ =100 ; .100" DIP PIN VERTICAL SPACING
GNDXOF__ =100 ; .100" X OFFSET FOR TWP GROUND PINS
BRDGND__=10 ; PIN 10 IS DEDICATED GROUND
BRDPWR__=20 ; PIN 20 IS DEDICATED POWER
;CONNECTORS
JXOFST__ =0 ; .000" X OFFSET FOR JACKS
JYOFST__=6700 ;6.700" Y OFFSET FOR J2
JYOFS1__ =300 ; .300" Y OFFSET FROM J2 TO J1
PXPNSP__ =100 ; .100" CONNECTOR PIN VERTICAL SPACING
PYPNSP__ =100 ; .100" CONNECTOR PIN HORIZONTAL SPACING
^^M216TV__. ;TRANSFER VECTOR FOR DOUBLE HEIGHT DEC BOARDS
-1 ;FLAGS IF WIRE WRAP OR PC BOARD
JRST CPOPJ ;THE INIT ROUTINE
JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS
JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS
JRST DISTPP ;DISTANCE CALC ROUTINE
JRST FPWR ;FIND A POST WITH POWER
JRST FGND ;FIND A POST WITH GND
JRST MAPIT ;CONVERT POST INTO X,Y,BITS
JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE
JRST GNDCLR ;?
JRST WAGGND ;?
JRST GNDOUT ;?
JRST VCCOUT ;?
MXPNL*UMLROW*NGRPS ;NROWS (USED FOR UML ONLY)
UMLCOL ;NCOLS (USED FOR UML ONLY)
UMLCOL ;NCLPRG (USED FOR UML ONLY)
UMLROW*2 ;NRWPRP (USED FOR UML ONLY)
MXPNL*GRPDIP*NGRPS ;DIPSLT_NROWS*NCOLS (USED FOR UML ONLY)
SETPAD(MXPNL*NGRPS*2) ;NPADS (USED FOR UML ONLY)
XWD -MXCNP2,1 ;PADLET (USED FOR UML ONLY)
XWD -1,0 ;PADPIN (USED FOR UML ONLY)
=10 ;FRACTN
=200*2 ;WRAPMG .200" INSULATION AROUND EACH POST
=1500 ;POSTMG .750" BARE WIRE AROUND EACH POST
0 ;NEXTR
CHECK M216TV,WTVLEN
;TABLES FOR MAPIT
;**************************************** DIP PINS
DEFINE XY(X,Y)
< X*XPINSP,,Y*YPINSP
>
PINTAB:
FOR Y_9, 0, -1
< XY(0,Y) ;first col of pins is on left (DIP side)
>
FOR Y_0, 9, 1
< XY(1,Y) ;2nd col is on right, +X is to right
>
;**************************************** DIP LOCATIONS
DEFINE XY(X,Y)
< X*XDIPSP,,Y*YDIPSP
>
DIPLOC:
FOR Y_<GRPROW-1>, 0, -1
<FOR X_<GRPCOL-1>, 0, -1
< XY(X,Y)
>>
;**************************************** SCOTCH-FLEX PINS
DEFINE XY(X,Y)
< X*PXPNSP,,Y*PYPNSP
>
FLXPIN:
FOR Y_1, 0, -1
<FOR X_0, <MXCNP2/2-1>, 1
< XY(X,Y)
>>
MAPIT: JUMPL A,CONMAP
PUSHJ P,MAPLOC ;MAP DIP LOCN
POPJ P, ;BAD LOCN
LDB TTT,[%%PINN,,A] ;PIN #
CAIL TTT,GPINS ;WANT POWER OR GROUND?
JRST PINPGP ;YES, RETURN FIX IT UP
MAPIT0: ADD T,PINTAB-1(TTT) ;ADD EXTRA XY FOR PIN
SETZ TT,
CAIN TTT,BRDGND
MOVSI TT,GND
CAIN TTT,BRDPWR
MOVE TT,[PWR,,=500] ;+5.00 VOLTS
SETZ TTT, ;FLUSH AWAY THOSE GOODIES
JRST CPOPJ1
; TWP GROUND PINS FOR SOCKET
PINPGP: ADD T,PINTAB-GPINS-1(TTT)
ADD T,[GNDXOF,,] ;EXTRA TWP GND PINS ARE .1 TO RIGHT
MOVSI TT,GND
PINPG1: SETZ TTT,
JRST CPOPJ1
;Convert PIN-SPEC in A into DIP X,Y locn (T)
;Y IS + UP
;X IS + RIGHT (FROM DIP SIDE)
MAPLOC: LDB TTT,[%DIPPNL,,A] ;GET PANEL NUMBER
JUMPE TTT,CPOPJ ;LOSER
MOVEI TT,MXPNL ;MAX NUMBER OF PANELS
CAILE TTT,MXPNL ;TOO BIG
POPJ P,
SUBM TT,TTT ;TTT gets <MXPNL-panel>, make 1 on top
IMULI TTT,PNLOFT ;VERTICAL OFFSET OF PANEL
LDB TT,[%DIPG,,A] ;GROUP LETTER
LDB T,[%DIPS,,A] ;DIP #
JUMPE T,CPOPJ
CAILE T,GRPDIP ;TOO MANY DIPS FOR SLOT
POPJ P,
MOVE T,DIPLOC-1(T) ;XY OF DIP SLOT
IMULI TT,GXOFST ;X FUDGE FOR GROUP, group A to left
MOVSI TT,-GXOFST(TT)
ADD T,TT ;LOCATION OF DIP ON BOARD
ADD T,TTT ;ADD IN PANEL OFFSET
JRST CPOPJ1
;HERE FOR CONNECTOR PINS
CONMAP: LDB TTT,[%CNPPNL,,A] ;GET PANEL NUMBER
JUMPE TTT,CPOPJ ;LOSER
MOVEI TT,MXPNL ;MAX NUMBER OF PANELS
CAILE TTT,MXPNL ;TOO BIG
POPJ P,
SUBM TT,TTT
IMULI TTT,PNLOFT ;VERTICAL OFFSET OF PANEL
LDB TT,[%CNPG,,A] ;GROUP LETTER
IMULI TT,GXOFST ;X FUDGE FOR GROUP
HRLI TTT,-GXOFST(TT)
LDB TT,[%CNPJK,,A]
ADDI TTT,JYOFST ;VERT OFFSET TO J2
SKIPG TT
ADDI TTT,JYOFS1 ; OFFSET TO J1
LDB T,[%%PINN,,A]
JUMPE T,CPOPJ
JUMPE TT,[CAILE T,MXCNP1 ;MAKE J1 CORRESPOND TO J2'S 50 PINS
POPJ P,
CAILE T,MXCNP1/2 ;IN BOTTOM ROW?
ADDI T,<MXCNP2-MXCNP1>/2 ;J2'S BOTTOM ROW STARTS +5 PINS W.R.T. J1
ADDI T,J1TO2 ;AND J1 IS DISPLACED 2 PINS RIGHT
JRST .+1]
CAILE T,MXCNP2
POPJ P,
SETZ TT,
CAILE T,MXCNP2/2 ;BOTTOM ROW IS GND
MOVSI TT,GND
MOVE T,FLXPIN-1(T) ;X,Y OF PIN
ADD T,TTT
SETZ TTT,
JRST CPOPJ1
PAKSIZ: SKIPE ILLPAK(B)
POPJ P,
;Check if package sticks outside of a single group
LDB T,[%DIPS,,A] ;STARTING DIP SLOT
SOS T
IDIVI T,GRPCOL ;DIP ROW, DIP COL #
SUB T,PAKHGT(B)
SUB TT,PAKWID(B) ;HORIZONTAL EXTENT OF ADAPTOR
JUMPL T,CPOPJ
JUMPL TT,CPOPJ
CAIGE T,GRPROW
CAIL TT,GRPCOL ;MUST BE WITHIN GROUP HORIZONTALLY
POPJ P,
JRST PAKDIM
;Define illegal package types in this board
ILLPAK: BLOCK NPACK
FOR @' I IN (22,24,36,40,48,64)
<ORG ILLPAK+K.'I  -1
>
ORG ILLPAK+NPACK
;T = UML-ROW-#,,UML-COL-#
COMMENT 
Map of the UML page printout
UML COL
1 2 ... NCOLS
UML ROW ------------------------------
1 F26 F21 ... F1
2 F27 F22 ... F2
...
5 F30 F25 ... F5
6 E26 E21 ... E1
...
NCLPRP

MAPRC: HLRZ TT,T ;(1,1) IS DIP IN UPPER LEFT HAND CORNER
SOJL TT,CPOPJ
CAML TT,NROWS ;MAX # ROWS (FOR PRINTOUT OF ALL PANELS)
POPJ P,
HRRZS T ;ROW IN TT, COL IN T
SOJL T,CPOPJ
CAML T,NCOLS ;(0,0) IS NOW IN UPPER LEFT
POPJ P,
PUSH P,[0]
;UML row = F(panel-#, group, col-within-group)
IDIVI TT,NGRPS*GRPCOL ;BREAK INTO PANEL#,COL WITHIN PANEL
ADDI TT,1
DPB TT,[%DIPPNL,,(P)]
MOVE TT,TTT
IDIVI TT,GRPCOL ;BREAK INTO GROUP#,COL#
MOVNS TT
ADDI TT,NGRPS ;GROUP F IS FIRST
DPB TT,[%DIPG,,(P)]
MOVNS T ;LAST UML COL CORRESPONDS TO FIRST DIP ROW
MOVEI T,UMLCOL-1(T)
IMULI T,UMLROW ;DIPSLOTS COUNT BY UMLROWS, THEN UMLCOLS
ADDI T,1(TTT)
DPB T,[%DIPS,,(P)]
POP P,T
JRST CPOPJ1
MAPPAD: SOS T ;STARTS AT 1 PANEL#*NGRPS+GROUP+JACK
LDB TTT,[POINT 1,T,35] ;THE JACK BIT
CAMLE TT,JACKSZ(TTT)
JRST [ SETZ T,
POPJ P,]
MOVSI TTT,MAPCON(TT) ;PIN# IN LH
DPB T,[%CNPJK,,TTT]
LSH T,-1
IDIVI T,NGRPS
AOS TT
DPB TT,[%CNPG,,TTT]
AOS T
DPB T,[%CNPPNL,,TTT]
MOVE T,TTT
POPJ P,
FPWR: CAIE B,=500 ;+5.00V??
JRST FPWRE
LDB T,[%%PINN,,A]
MOVEI B,BRDPWR
DPB B,[%%PINN,,A]
TLO A,MAPSOC
JUMPL A,FPWRC
POPJ P,
FPWRE: SETZ A,
POPJ P,
FPWRC: LDB TT,[%CNPJK,,A] ;J1 OR J2?
JUMPN TT,FPWRC1 ;J2
CAILE T,MXCNP1/2 ;SECOND ROW J1?
ADDI T,<MXCNP2-MXCNP1>/2 ;YES, ADJUST TO NUMBERING OF 2ND ROW J2
ADDI T,J1TO2
FPWRC1: CAILE T,MXCNP2 ;LEGAL?
JRST FPWRE
SOS T
IDIVI T,MXCNP2/2 ;TREAT ROW 2 AS ROW 1
DEFINE FOO(N,SLOT)
<REPEAT N,<SLOT>>
MOVE T,(T)[ FOO(3,1) ;1-3
FOO(5,2) ;4-8
FOO(5,3) ;9-13
FOO(5,4) ;14-18
FOO(7,5)] ;19-25
DPB T,[%DIPS,,A]
SETZ T,
DPB T,[%DIPOF,,A]
POPJ P,
FGND: JUMPL A,FGNDC
MOVEI B,BRDGND
DPB B,[%%PINN,,A]
TLO A,MAPSOC
POPJ P,
FGNDC: LDB TT,[%CNPJK,,A]
HRRZ TT,JACKSZ(TT)
ASH TT,-1
LDB T,[%%PINN,,A]
CAMG T,TT
ADD T,TT
DPB T,[%%PINN,,A]
TLO A,MAPSOC
POPJ P,
FOR NAME (GNDCLR:,WAGGND:,GNDOUT:,VCCOUT:)
<NOTYET(NAME)
>
>;MWL
>;MDWL
BEND MPG216

941
src/wl/mupac.502 Normal file
View File

@@ -0,0 +1,941 @@
.ADD(ALLLOCS,MUPAC,MUPACV)
MDWL,<
.ADD(ALLWW,MUPAC,MUPATV)
>;MDWL
;Note! These .ADD's must be outside of block structure
COMMENT 
The MUPAC Model # 3244806-01 wire wrap board:
The board has 6 rows of sockets, 20 in each row.
However, between columns 10 and 15, there is a kludgey
universal pattern. Each universal column is 59 pins high,
spaced out:
(11) - .2" - (12) - .1" - (13) - .3" - (14)
The DIP slot nomenclature is:
%DIPG %DIPS
---------- -----------------------------
"standard" <D,E,F,G,H,J> <01:10, 15:24>
"universal" <01:59> <11:14>
Dip D01 is at upper left, viewed fom DIP side,
with the front edge connectors at the top
The board uses 16 pin DIP sockets, with a "G" pin just
below pin 8, and a "V" pin above pin 16. (Actually, some
are "V1" and some are "V2" pins, but the are all treated as +5V).
It is also assumed that pin 8 has been grounded on the board.
There are two front connectors, each with 3 rows of 36 pins.
There is one back connector, with 3 rows of 18 pins.
The connector nomenclature is:
%CONN %CONP
---------- ------------------------------
"front" <1:2><A,B,C> <01:36>
"back" <X,Y,Z> <01:18>
where the "2" front connector is flagged
by %CONN having the 40 bit on.

BEGIN MUPAC
%DIPG__<POINT 6,,23>-=18 ;DIP GROUP (The letter)
%DIPS__<POINT 6,,29>-=18 ;DIP SLOT (The number)
%DIPOF__<POINT 6,,35>-=18 ;DIP OFFSET
define DIPSLT(letter,number)
< ifdif<letter><J><<"letter"+1-"A">=12 + =number6>
ifidn<letter><J><<"letter"+1-"A"-1>=12 + =number6>
>
%CONN__<POINT 6,,23>-=18 ;CONNECTOR NUMBER (LETTER OR JACK #)
%CONP__<POINT 12,,35>-=18 ;CONNECTOR PIN #
define CONLOC(num1,letter,number)
< ifidn<num1><><<"letter"+l.x-"X">=12 + =number >
ifidn<num1><1><<"letter"+1-"A">=12 + =number >
ifidn<num1><2><<"letter"+41-"A">=12 + =number >
>
GPIN__0 ;"G" PIN, JUST BELOW PIN 8
VPIN__=17 ;"V" PIN, JUST ABOVE PIN 16
BRDGND__8 ; PIN 8 IS GROUNDED
;TABLE TO TEST FOR UNIVERSAL DIP COLUMNS (%DIPS)
UNICOL: FOR I_0,=10
< 0
>
FOR I_=11,=14
< 1B0
>
FOR I_=15,=24
< 0
>
MXDIPS__=24 ;MAX %DIPS
;L.D through L.J are the legal %DIPG for normal
MXUDPG__=59 ;MAX %DIPG FOR UNIVERSAL
;EDGE CONNECTORS
MXFRONT__=36 ;MAX 36 PINS PER ROW IN FRONT
MXBACK__=18 ;MAX 18 PINS PER ROW IN BACK
;THE TRANSFER VECTOR FOR THE MUPAC WW BOARD
^MUPACV:
JRST LCINIT ;BOARD INITIALIZATION
JRST QUPIN ;CHECKS FOR WILD CONNECTOR BODIES (UNUSED)
JRST $SLTOUT ;PRINTS CARD LOC (B-R-S)
JRST $GETSLT ;READS CARD LOC (B-R-S)
JRST PRNLOC ;PRINTS SOCKET, DIP, OR CONNECTOR LOC
JRST PRNPIN ;PRINTS SOCKET, DIP, OR CONNECTOR PIN
JRST CPNSEP ;SEPARATE CONNECTORS LOC/PIN PARTS FROM 18 BIT FORM
JRST CPNMER ;MERGE CONN LOC/PIN PARTS BACK
JRST CPNMAP ;MAP CARD LOC, CPIN-LOC INTO BACKPANEL PIN LOC
MDWL,< JRST MAPOST > ;CONVERT FROM DIP-LOC/PIN TO POST
MDPC,<
JRST GTSLTL ;READS (B-R-S) AND BODY LOCN
MD,< JRST GTCONP ;READS (B-R-S) AND CONNECTOR PIN
JRST CPOPJ ;LOCFUK - FOR UPCONVERTING OLD DRWVERS
>;MD
>;MDPC
MWL,<
JRST GETLOC ;READS EITHER DIP LOC, OR CONNECTOR LOC
JRST RAYDIP ;PRINTS DIP, OR CONNECTOR LOC IN FORTRAN FORM
JRST CPARTP ; (PRINT EDGE PIN TO PARTITION FILE)
JRST SEQLOC ;TESTS FOR BODY LOCS BEING SEQUENTIAL
JRST CONGIN ;GENERATE NEXT INVENTED PIN TO REPLACE "U" PINS
JRST $GTSLTT ;GETSLT, BUT WITH FIRST CHAR IN CHRREG
>;MWL
[ASCIZ/B-R-S (#)/] ; CUE FOR BOARD SLOT
[ASCIZ /#/] ; CUE FOR BOARD PIN
MDPC,< [ASCIZ/#<A,B,C># or <X,Y,Z># /] ;CUE FOR CONNECTOR PIN
[ASCIZ/L# or L#@# or #-#/] ;CUE FOR BODY LOC
[ASCID /D01/] ;PROTOTYPE FOR BODY LOC
>;MDPC
MWL,< [ASCIZ/L# or #-#/] ;WIRELISTER BODY CUE
[ASCIZ/#L or L/] ;WIRELISTER CONNECTOR BODY CUE
>;MWL
CHECK MUPACV,LTVLEN
L2NSUB: BLOCK L2NLEN ;*******
N2LSUB: REPEAT N2LLEN, < "?"
>
EN2L__.
NNN__1
FOR I IN(A,B,C,D,E,F,G,H,J,K,L,M,N,P,R,S,T,U,V,W)
< L2N2L I,0
>
L.X__NNN
FOR I IN(X,Y,Z)
< L2N2L I,0
>
FOR I IN (I,O,Q)
< L2N2L I,1B0
>
N2LMAX__NNN-1
L.D__4 ;D IS 4TH LETTER
L.J__L.D+5 ;D,E,F,G,H,J
ORG EN2L
LCINIT: MOVE T,[L2NSUB,,L2N]
BLT T,L2N+L2NLEN+N2LLEN-1
MOVEI T,N2LMAX
MOVEM T,MAXN2L
POPJ P,
;Print Socket or DIP loc.
;A= (MAPCON),,loc
; returns TT the seperator charbetween loc-pin, if any
PRNLOC: SETZ TT,
JUMPE A,CPOPJ
MOVEI T,2 ;SETUP FOR 2 DIGIT NUMBER PRINT
MOVEM T,NDIG
JUMPL A,CNLOC
LDB T,[%DIPS,,A] ;DIP COLUMN
SKIPGE UNICOL(T) ;IN UNIVERSAL AREA?
JRST [ PUSH P,T ;YES, SAVE COLUMN
LDB T,[%DIPG,,A] ;PRINT ROW 01-59
PUSHJ P,NPUTDEC
PUTBYT "-"
POP P,T ;NOW COL 11-14
PUSHJ P,NPUTDEC
JRST PRNLC1]
;In normal DIP sockets, print Letter-number
LDB T,[%DIPG,,A] ;GROUP LETTER
PUTBYT @N2L(T) ;CONVERT TO LETTER AND PRINT
LDB T,[%DIPS,,A] ;SLOT NUMBER WITHIN GROUP
PUSHJ P,NPUTDEC ;PRINT IT OUT
LDB T,[%DIPOF,,A] ;ANY SLOT OFFSET?
JUMPE T,PRNLC1
PUTBYT "@"
MWL,< PUSHJ P,NPUTDEC >
MDPC,< PUSHJ P,PUTDEC >
PRNLC1: MOVEI TT,"-"
POPJ P,
CNLOC: LDB T,[%CONN,,A] ;CONNECTOR NUMBER
MOVEI TT,"1"
TRZE T,40
MOVEI TT,"2"
CAIGE T,L.D ;A,B,C is front conn
PUTBYT (TT) ; "1 or 2"
PUTBYT @N2L(T) ; "A,B,C X,Y,Z"
SETZ TT, ;NO SEPARATOR NECESSARY
POPJ P,
PRNPIN: LDB T,[%%PINN,,A]
JUMPL A,PRNPN1 ;a connector pin?
CAIN T,VPIN ;No, check for V,G
JRST [ PUTBYT "V"  POPJ P,]
CAIN T,GPIN
JRST [ PUTBYT "G"  POPJ P,]
PRNPN1: MOVEI TT,2
MOVEM TT,NDIG
JRST NPUTDEC
;CONVERT PIN-SPEC TO POST-SPEC
;MAPOST (DWL) - CONVERT FROM DIP-LOC,PIN# TO SOCKET-LOC, PIN#
;A = MBIT+PIN#,,LOC
;B = PACKAGE
;Skips if can map, with MAPSOC set.
; Possibly MAPPWR or MAPGND if V or G posts on board
;A = New MBIT+PIN#,,LOC
;B = FLAGS,,PIN CHANGE
; %MPLOC ;LOC WAS CHANGED
; %MPPIN ;PIN WAS CHANGED, DIFFERENCE IN RH (TO CHECK FOR +1)
; %MPPL1 ;PIN NUMBER CHANGED BY 1 (KLUDGE)
MDWL,<
MAPOST: TLNN A,CRDPIN ;SHOULDN'T BE ON
TLOE A,MAPSOC
OUTSTR [ASCIZ /PIN ALREADY MAPPED TO POST???
/]
JUMPL A,[SETZ B, ;CONNECTOR, NO CHANGE
JRST CPOPJ1]
PUSH P,C
PUSH P,D
PUSH P,A
LDB C,[%DIPS,,A] ;DIP COLUMN
LDB D,[%DIPG,,A] ;DIP ROW
LDB A,[%%PINN,,A] ;PIN#
JUMPE A,MAPOS1 ;SPECIAL HACK JUST TO FLUSH %DIPOF
SKIPGE UNICOL(C) ;IN UNIVERSAL AREA?
JRST MUPUNI ; YES
;Dip is in 16 pin socket area of board, call standard
;mapper routine which handles DIPs/SIPs/Adaptors and DIP-offsets.
SKIPE ILLPAK(B) ;CAN PACKAGE FIT IN DIP SOCKET?
JRST MAPOSX ; NOT QUITE
LDB D,[%DIPOF,,(P)] ;OFFSET FIELD WITHIN SOCKET
MOVEI C,=16 ;BOARD HAS 16 PIN SOCKETS
PUSHJ P,MAPPER ;RETURNS (PIN,FLAGS,HORIZ-OFF,VER-OFF)
JRST MAPOSX
LDB T,[%DIPS,,(P)] ;NOW OFFSET SLOT
MOVE TT,T
ADD TT,C
SKIPL UNICOL(TT) ;FALLS INTO UNIVERSAL COLMNS?
CAILE TT,MXDIPS ;FALLS OFF end of board?
JRST MAPOSX
ADD T,C
DPB T,[%DIPS,,(P)]
LDB T,[%DIPG,,(P)] ;FIRST ROW IS A (=1)
ADD T,D ;DOES OFFSET OVERFLOW NO. OF ROWS?
CAILE T,L.J ;LEGAL ROW #
JRST MAPOSX
DPB T,[%DIPG,,(P)]
MAPOS1: SETZ T,
DPB T,[%DIPOF,,(P)] ;WITHIN SOCKET OFFSET GOES AWAY
DPB A,[%%PINN,,(P)]
AOS -3(P)
MAPOSX: POP P,A
POP P,D
POP P,C
POPJ P,
;Package is in universal area of board,
;A = Pin#
;B = package
;C = column (11-14)
;D = row (1-59)
;Check for legal packages, then make new location,
; with pin# equal to 0, the post location is entirely
; specified by "DIP" loc which is row-column.
MUPUNI: HRRZ T,MAPDSP(B) ;WHAT TYPE OF PACKAGE?
CAIN B,K.SGR1 ;KLUDGEY S.GRAY 20 PIN DIP ADAPT
JRST [ CAIE C,=11 ;ONLY IN COL 11
JRST MAPOSX
CAIG A,=10 ;2ND LEG?
JRST MAP1ST
SUBI A,=20+1
MOVNS A
AOJA C,MAP1ST]
CAIN T,SIP
JRST MAP1ST ;LIKE 1ST ROW OF DIP
CAIE T,DIP ;IS DIP?
JRST MAPOSX ; NO, ILLEGAL THEN
;Is a DIP, check for legal columns depending on DIP leg spacing,
; then map column if pin is in 2nd row of DIP pins
HRRZ TT,PACKPN(B)
ASH TT,-1 ;# PINS ON ONE SIDE OF DIP
HRRZ T,DIPLEG(B) ;HOW FAR APART DIP legs?
CAIN T,=400
JRST [ CAIE C,=12 ;ONLY IN COL 12
JRST MAPOSX
CAMG A,TT ;FIRST ROW OF PINS?
JRST MAP1ST
MOVEI C,=14 ;MAPS INTO COL 14
JRST MAP2ND]
CAIN T,=600
JRST [ CAIE C,=11
JRST MAPOSX
CAMG A,TT ;FIRST ROW OF PINS?
JRST MAP1ST
MOVEI C,=14 ;MAPS INTO COL 14
JRST MAP2ND]
CAIE T,=300 ; .3" SPACING?
JRST MAPOSX ;NO, LOSE
;Standard .3" DIP
CAIE C,=11 ; ONLY LEGAL IN 11 OR 13
CAIN C,=13
CAIA
JRST MAPOSX
CAMG A,TT ;WHICH ROW OF DIP PINS?
JRST MAP1ST ; FIRST
CAIN C,=13 ;SECOND, 13 GOES TO 14
MOVEI C,=14
CAIN C,=11 ;11 GOES TO 13
MOVEI C,=13
MAP2ND: SUB A,PACKPN(B)
SUB D,A ; 16-PIN# IS DISPLACEMENT
CAIA
MAP1ST: ADDI D,-1(A) ;OFFSET ROW BY PIN#
skipl d
caile d,=59
jrst maposx
DPB C,[%DIPS,,(P)]
DPB D,[%DIPG,,(P)]
SETZ A, ;NULL PIN #, ALL IS IN LOC
MOVSI B,%MPLOC!%MPUNI ;UNIVERSAL LOC INCLUDES PIN#
JRST MAPOS1
;Test for an illegal package in this board
ILLPAK: BLOCK NPACK
FOR @' I IN (18,20,22,24,36,40,48,64,624aug,624xug)
<ORG ILLPAK+K.'I  -1 ;ILLEGAL IN THIS BOARD
>
ORG ILLPAK+NPACK
>;MDWL
;THIS SHOULD CHECKFOR B-R-S ??
;Read a body locn into DESTIN.
;returns - FAIL
; CRLF ONLY
; OK
; B-R-S seen
MDPC,<
GTSLTL: PUSH P,A
MOVEI A,[[ASCIZ /L#./]
[asciz /#-#./] ;UNIVERSAL LOCN
0]
PUSHJ P,LNPARS
JRST GTSL0
JRST GTSL1
PUSHJ P,GATLOC
JRST GTSL0
CAIE CHRREG,"@"
JRST GTSL2
PUSH P,TT
GETNUM
POP P,TT
JUMPE NUMREG,GTSL0
DPB NUMREG,[%DIPOF,,TT]
GTSL2: MOVEM TT,DESTIN
AOS -1(P)
GTSL1: AOS -1(P)
GTSL0: POP P,A
POPJ P,
>;MDPC
;Assemble loc from parsed argument
GATLOC: SETZ TT,
CAIN A,1 ;UNIVERSAL STUFF?
JRST [ MOVE T,ARG3 ;#-#
CAIL T,=11 ;MUST BE COLS 11-14
CAILE T,=14
POPJ P,
DPB T,[%DIPS,,TT]
MOVE T,ARG1 ;MUST BE 1-59
CAILE T,MXUDPG
POPJ P,
DPB T,[%DIPG,,TT]
JRST CPOPJ1]
MOVE T,ARG2 ;L#
CAILE T,MXDIPS ;MUST BE 1-10,15-24
POPJ P,
CAIL T,=11
CAILE T,=14
CAIA
POPJ P,
DPB T,[%DIPS,,TT] ;DIP ROW, LETTER OR 1-59
MOVE T,ARG1
CAIL T,L.D
CAILE T,L.J
POPJ P,
DPB T,[%DIPG,,TT] ;DIP COLUMN, 1-24
JRST CPOPJ1
MD,<
;Read connector locn
; (This should probably try for B-R-S also, but...?)
GTCONP: PUSH P,A
MOVEI A,[[ASCIZ /L#/]
[ASCIZ /#L#/]
0]
PUSHJ P,LNPARSE
JRST GTCON0
JRST GTCON1 ;NULL INPUT
PUSHJ P,GATCON ;GET JACK OR PADDLE PART OF LOC
JRST GTCON0
MOVE T,ARG2
CAIE A,0
MOVE T,ARG3
GTCON3: DPB T,[%CONP,,TT]
HRRZM TT,DESTIN
AOS -1(P)
GTCON1: AOS -1(P)
GTCON0: POP P,A
POPJ P,
>;MD
GATCON: SETZ TT,
JUMPE A,[
MOVE T,ARG1
CAIGE T,L.X ;BETTER BE X,Y,Z
POPJ P,
JRST GTCN2]
MOVE T,ARG2
CAIL T,L.D ;BETTER BE A,B,C
POPJ P,
SOSLE ARG1
TRO T,40
GTCN2: DPB T,[%CONN,,TT]
TLO TT,MAPCON
JRST CPOPJ1
MWL,<
GETLOC: MOVEI A,[[ASCIZ /L#/] ;0 - DIP or back connector
[ASCIZ /#-#/] ;1 - DIP in universal columns
[ASCIZ /L#@#/] ;2 - DIP with offset
[ASCIZ /L/] ;3 - BACK CONNECTOR
[ASCIZ /#L/] ;4 - front connector
0]
PUSHJ P,LNPARSE
POPJ P,
POPJ P,
CAIL A,3 ;CONN OR DIP?
JRST [ SUBI A,3
JRST GATCON]
PUSHJ P,GATLOC
POPJ P,
MOVE T,ARG4
CAIN A,2 ;L#@#
DPB T,[%DIPOF,,TT]
JRST CPOPJ1
;Print location for fixed format card image
;8 cols wide, with "group" left justified, "pin number" right justified
RAYDIP: TLNN A,MAPSOC
PUSHJ P,FUCKUP
PUTBYT "?" ;FOR NOW
POPJ P,
FOR NAME IN (CPARTP:,CONGIN:)
<NOTYET(NAME)
>
>;MWL
CPNSEP: LDB TT,[%CONP,,T]
MOVEI TTT,0
DPB TTT,[%CONP,,T]
POPJ P,
CPNMER: PUSH P,A
LDB T,[%CONN,,T]
SKIPN T
SKIPE TT
JRST CPNMR1
MOVEI TT,1 ;INITITIALZE, PIN1
MOVEI T,1 ;A
CPNMR1: MOVE TTT,T
TRZ TTT,40 ;1A OR 2A
CAIL TTT,L.D ;A,B,C?
JRST CPNBAK
CAILE TT,MXFRONT
JRST [ MOVEI TT,1
AOS T
CAIN T,L.D
MOVEI T,41
CAIN T,L.D+40
MOVEI T,L.X
JRST .+1]
CPNMR2: DPB T,[%CONN,,T]
DPB TT,[%CONP,,T]
POP P,A
POPJ P,
CPNBAK: CAIGE TT,MXBACK
JRST CPNMR2
MOVEI TT,1
AOS T
JRST CPNMR2
QUPIN: SETZ A, ;NO RULE NUMBER
POPJ P, ;AND IT'S NOT WILD
NOTYET(CPNMAP:)
MWL,<
SUBTTL WIRE WRAP ROUTINES -- MUPAC BOARD
comment 
All calculations are done from the DIP side.
(0,0) at LOWER left hand corner in left handed coordinate system.
X+ to right, Y+ is up
(0,0) is .1" to left of J1(G), 1.0" below
DIP socket pin 1 is upper left.
MAP OF BOARD (DIP SIDE)
-----------------------
1A<1:36> 2A<1:36>
conns 1B " 2B "
1C " 2C "
D1 D2 ... D10 11 - 12 -13 -14 D14 ... D24
E1 ... ...
F1 ... (59 pins per column)
G1 universal pattern
H1 ...
J1 ...
X<1:18>
back conn Y<1:18>
Z<1:18>

^^MUPATV__. ;TRANSFER VECTOR FOR QUAD HEIGHT 20 PIN DEC BOARDS
-1 ;FLAGS IF WIRE WRAP OR PC BOARD
JRST CPOPJ ;THE INIT ROUTINE
JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS
JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS
JRST DISTPP ;DISTANCE CALC ROUTINE
JRST FPWR ;FIND A POST WITH POWER
JRST FGND ;FIND A POST WITH GND
JRST MAPIT ;CONVERT POST INTO X,Y,BITS
JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE
JRST GNDCLR ;?
JRST WAGGND ;?
JRST GNDOUT ;?
JRST VCCOUT ;?
;Define a UML map, 20 rows x 6 columns, but leave out the
; universal pattern stuff because I can't figure out how
; to print it.
=20 ;NROWS (USED FOR UML ONLY)
=6 ;NCOLS (USED FOR UML ONLY)
=6 ;NCLPRG (USED FOR UML ONLY)
0 ;NRWPRP (USED FOR UML ONLY)
=120 ;DIPSLT_NROWS*NCOLS (USED FOR UML ONLY)
SETPAD(=9) ;NPADS (USED FOR UML ONLY)
-=36,,1 ;PADLET (USED FOR UML ONLY)
-1,,0 ;PADPIN (USED FOR UML ONLY)
;Define some wire/wrap lengths ????
=10 ;FRACTN
=200*2 ;WRAPMG .200" INSULATION AROUND EACH POST
=1500 ;POSTMG .750" BARE WIRE AROUND EACH POST
0 ;NEXTR
CHECK MUPATV,WTVLEN
;Define locations on board, in 1 mil increments, from DIP side
RADIX =10
DIP00x__100 ;Column 1, pin 1 is .1" from 0
DIP00y__6800 ;row D, pin 1 is 6.8" from 0
DEFINE INCR(STEP)< ..TEM  ..TEM__..TEM+STEP  >
DEFINE DECR(STEP)< ..TEM  ..TEM__..TEM-STEP  >
;X location for pin 1 of socket in column #
DIPX: ..TEM__DIP00X
0 ;COL 0
INCR(400) ;COL 1 to COL 2
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(500) ;COL 10-pin-1 TO 11
INCR(200)
INCR(100)
INCR(300)
INCR(200) ;COL 14 TO 15-pin-1
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(400)
INCR(0) ;COL 24
DIPY: ..TEM__DIP00Y
0  0  0  0 ;0, A,B,C
DECR(1000) ;ROW D
DECR(1000)
DECR(1000)
DECR(1000)
DECR(1000)
DECR(1000) ;ROW J
;Offsets of DIP pin within socket
PINX: 0 ;G PIN
0 ;1
0
0
0
0
0
0
0 ;8
300 ;9
300
300
300
300
300
300
300 ;16
300 ;V PIN
PINY: -800 ;G PIN
0 ;1
-100
-200
-300
-400
-500
-600
-700 ;8
-700 ;9
-600
-500
-400
-300
-200
-100
0 ;16
100 ;V PIN
;Mapping for connectors, index by (CONnum*36)+connpin-1
; where connum 0:8 are 1A,1B,1C,2A,2B,2C,X,Y,Z
define conrow(x,y)<
for i_0,3500,100
< x+i,,y  > >
CONTBL: CONROW(100,7700) ;1A
CONROW(100,7600) ;1B
CONROW(100,7500) ;1C
CONROW(5300,7700) ;2A
CONROW(5300,7600) ;2B
CONROW(5300,7500) ;2C
CONROW(3600,500) ;X
CONROW(3600,400) ;Y
CONROW(3600,300) ;Z
RADIX 8
MAPIT: JUMPL A,CONMAP ;MAP CONNECTOR LOCATION
LDB T,[%DIPS,,A] ;DIP COLUMN
LDB TT,[%DIPG,,A] ;DIP ROW
SKIPN UNICOL(T)
JRST MAPITD ;IS A NORMAL 16 PIN SOCKET
;Pin is in universal pattern area
MOVNS TT
ADDI TT,=59
IMULI TT,=100 ;IN .1" INCREMENTS
ADDI TT,=1000 ;ROW 59 IS 1.0" UP
HRLZ T,DIPX(T) ;XOLUMN X
HRR T,TT ;X,,Y
SETZB TT,TTT ;NO PWR,GND
JRST CPOPJ1
;Pin is in some dip socket
MAPITD: HRRZ T,DIPX(T)
HRRZ TT,DIPY(TT)
LDB TTT,[%%PINN,,A] ;WHICH PIN?
CAIN TTT,VPIN
JRST [ PUSH P,[PWR,,=500]
MOVEI TTT,=17 ;LOOKS LIKE PIN 17
JRST MAPIT1]
CAIN TTT,GPIN
JRST [ PUSH P,[GND,,0]
MOVEI TTT,0 ;LOOKS LIKE PIN 0
JRST MAPIT1]
PUSH P,[0] ;NEITHER PWR/GND
MAPIT1: ADD T,PINX(TTT)
ADD TT,PINY(TTT)
HRLZS T
HRR T,TT ;X,,Y
POP P,TT ;PWR/GND BITS
SETZ TTT,
JRST CPOPJ1
;Here for connector pins
CONMAP: LDB TTT,[%CONN,,A] ;WHICH CONNECTOR GROUP?
;Compress the possible connector groups into an index
TRZE TTT,40 ;2A,2B,2C?
ADDI TTT,3
CAIL TTT,L.X
SUBI TTT,L.X-7
IMULI TTT,=36
LDB TT,[%%PINN,,A]
ADDI TTT,-1(TT) ;CONGRP*36 + CONPIN -1
MOVE T,CONTBL(TTT) ;GET PIN X,,Y
;Now check for the dedicated pwr/ground pins on front connectors
CAIE TT,1
CAIN TT,=18
CAIA
CAIN TT,=36 ;GROUND ON 1,18,36
JRST [ MOVSI TT,GND ;FLAG AS GND PIN
JRST CONMA1]
CAIL TTT,2 ;IN 1A,1B,1C?
JRST CONMA2 ; NO
CAIL TT,4 ; PWR IS ON 4-8, 31-35
CAILE TT,8
JRST [ CAIL TT,=31
CAILE TT,=35
JRST CONMA2
JRST .+1]
SKIPA TT,[PWR,,=500]
CONMA2: SETZ TT,
CONMA1: SETZ TTT,
JRST CPOPJ1
PAKSIZ: LDB T,[%DIPS,,A] ;DIP COLUMN
LDB TT,[%DIPG,,A] ;DIP ROW
SKIPE UNICOL(T) ;UNIVERSAL AREA?
JRST PAKDIM ;YES, ASSUME IT'S OK ???
ADD TT,PAKHGT(B)
CAILE TT,L.J
POPJ P, ;BARF! FALLS OFF BOTTOM
CAIG T,=11 ;IN AREA TO LEFT OF UNIVERSAL?
JRST [ ADD T,PAKWID(B)
CAILE T,=11 ;BETTER NOT FALL INTO UNIVERSAL
POPJ P,
JRST PAKDIM]
ADD T,PAKWID(B)
CAILE T,=24
POPJ P,
JRST PAKDIM
MAPRC: HLRZ TT,T ;UML ROW is DIP column on card
HRRZS T ;UML COL is DIP row on card
EXCH T,TT
MOVNS T
ADDI T,=24+1 ;FIRST ROW IS 24
CAIGE T,=15
SUBI T,4 ;SKIP UNIVERSAL COLS
SKIPG T
POPJ P,
MOVNS TT
ADDI TT,L.J+1
CAIGE TT,L.D
POPJ P,
MOVE TTT,T
SETZ T,
DPB TT,[%DIPG,,T]
DPB TTT,[%DIPS,,T]
JRST CPOPJ1
;Generate sequence of connector pins for UML printout
;T= connector "group" - 1A,1B,..,2A,...,X,...
;TT = padlet - 1:36
MAPPAD: CAILE T,=9
JRST MAPLUZ
CAILE TT,=36
JRST MAPLUZ
CAILE T,6 ;BACK CONN?
JRST [ ADDI T,L.X-7
DPB T,[%CONN,,T]
JRST MAPPA1]
CAILE T,3
JRST [ SUBI T,3  TRO T,40  JRST .+1]
DPB T,[%CONN,,T]
MAPPA1: TLO T,MAPCON!MAPSOC
DPB TT,[%%PINN,,T]
SETZ TTT,
DPB TTT,[%CONP,,T]
POPJ P,
MAPLUZ: SETZ T,
POPJ P,
;Find a PWR/GND pin on board closest to this pin
STORAGE(IMPURE)
FPWRGND: 0 ;EITHER VPIN OR GPIN
FPWRPTR: 0 ;INDEX OF CUURENT CANDIDATE
STORAGE(PURE)
;A = MAPSOC+$$PINN,,LOC
;B = VOLTAGE
FPWR: CAIE B,=500 ;+5.00V??
JRST [ SETZ A,
POPJ P,]
SKIPA T,[MAPSOC+VPIN]
FGND: MOVEI T,MAPSOC+GPIN
MOVEM T,FPWRGND ;WHAT TO LOOK FOR
JUMPL A,FPWCON ;A CONNECTOR?
LDB T,[%DIPS,,A] ;COLUMN OF PIN
SKIPN UNICOL(T) ;IN UNIVERSAL AREA?
JRST [ MOVE T,FPWRGND ;NO, SIMPLE
DPB T,[%%PINN,,A] ;MAKE INTO V,G PIN
POPJ P,]
;In universal area, look for V,G pin on eother side
MOVEI T,FPWUNI-1 ;LIST OF SLOTS AROUND UNIVERSAL
FPWR1: MOVEM T,FPWRPTR
PUSHJ P,FINDCLOSEST
POPJ P, ;RETURNS HERE WITH BEST
AOS T,FPWRPTR
SKIPGE A,(T)
POPJ P, ;END OF LIST
HRL A,FPWRGND
JRST CPOPJ1
FPWCON: LDB TT,[%CONN,,A] ;FRONT OR BACK?
TRZ TT,40
MOVEI T,FPWFR-1 ;Search on front dips slots
CAIL TT,L.X
MOVEI T,FPWBAK-1 ;Search on back dips slots
JRST FPWR1
;Search list around universal area
FPWUNI: DIPSLT(D,10)
DIPSLT(E,10)
DIPSLT(F,10)
DIPSLT(G,10)
DIPSLT(H,10)
DIPSLT(J,10)
DIPSLT(D,15)
DIPSLT(E,15)
DIPSLT(F,15)
DIPSLT(G,15)
DIPSLT(H,15)
DIPSLT(J,15)
-1
FPWFR: DIPSLT(D,1)
DIPSLT(D,2)
DIPSLT(D,3)
DIPSLT(D,4)
DIPSLT(D,5)
DIPSLT(D,6)
DIPSLT(D,7)
DIPSLT(D,8)
DIPSLT(D,9)
DIPSLT(D,10) ;DON'T LOOK IN UNIVERSAL
DIPSLT(D,15)
DIPSLT(D,16)
DIPSLT(D,17)
DIPSLT(D,18)
DIPSLT(D,19)
DIPSLT(D,20)
DIPSLT(D,21)
DIPSLT(D,22)
DIPSLT(D,23)
DIPSLT(D,24)
-1
FPWBAK: DIPSLT(J,1)
DIPSLT(J,2)
DIPSLT(J,3)
DIPSLT(J,4)
DIPSLT(J,5)
DIPSLT(J,6)
DIPSLT(J,7)
DIPSLT(J,8)
DIPSLT(J,9)
DIPSLT(J,10) ;DON'T LOOK IN UNIVERSAL
DIPSLT(J,15)
DIPSLT(J,16)
DIPSLT(J,17)
DIPSLT(J,18)
DIPSLT(J,19)
DIPSLT(J,20)
DIPSLT(J,21)
DIPSLT(J,22)
DIPSLT(J,23)
DIPSLT(J,24)
-1
FOR NAME IN (GNDCLR:,WAGGND:,GNDOUT:,VCCOUT:)
<NOTYET(NAME)
>
>;MWL
BEND MUPAC

1031
src/wl/ncp13.43 Normal file

File diff suppressed because it is too large Load Diff

1049
src/wl/ug61c.13 Normal file

File diff suppressed because it is too large Load Diff

935
src/wl/w940.308 Normal file
View File

@@ -0,0 +1,935 @@
;<WIRELIST>W940.FAI.13, 15-NOV-75 19:05:04, EDIT BY HELLIWELL
MDWL,<
.ADD(ALLWW,W940,W940TV)
.ADD(ALLWW,W941,W941TV)
.ADD(ALLWW,W942,W940TV)
.ADD(ALLWW,W943,W941TV)
.ADD(ALLWW,W946,W946TV)
;Note! These .ADD's must be outside of block structure
MWL,<
BEGIN WW940
comment 
These are formats for W940 series wire wrap cards. If the sign bit is 0
then it is a dip pin otherwise it is a connector pin.
dip pin spec: E#(#)
The E must literally be there. The first # is the slot, the letter is the pin.
There is a hack for specifying slots via a letter number-matrix.
______|_____|_____|_____|_____|_____|_____|_____|_____|_____|_____|_____|
| 11 17 23 35
| 12 | 6 | 6 | 12 |
|_______________________|___________|___________|_______________________|
| | | |
< | | | |----------->loc #
| | |
< | | |------------------------------>loc letter
| |
< | |------------------------------------------>dip pin #
|
< |----------------------------------------------------------->flags
connector pin spec: LL#
The first letter is the paddle, the second letter is the pin and the # is the
side of the board.
______|_____|_____|_____|_____|_____|_____|_____|_____|_____|_____|_____|
| 11 17 23 29 35
| 12 | 6 | 6 | 6 | 6 |
|_______________________|___________|___________|___________|___________|
| | | | |
< | | | | |------>side
| | | |
< | | | |------------------>pin letter
| | |
< | | |------------------------------>paddle
| |
< | |------------------------------------------>not used
|
< |----------------------------------------------------------->flags

^W941TV__. ;TRANSFER VECTOR FOR DOUBLE HEIGHT DEC BOARDS
-1 ;FLAGS IF WIRE WRAP OR PC BOARD
JRST CPOPJ ;THE W/W INIT ROUTINE
JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS
JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS
JRST DISTCB ;DISTANCE CALC ROUTINE
JRST FPWR ;FIND A POST WITH POWER
JRST FGND ;FIND A POST WITH GND
JRST MAPIT ;CONVERT POST INTO X,Y,BITS
JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE
JRST GNDCLR ;?
JRST WAGGND ;?
JRST GNDOUT ;?
JRST VCCOUT ;?
5 ;NROWS FOR DOUBLE HEIGHT
5 ;NCOLS
0 ;NCLPRG
0 ;NRWPRP
=25 ;DIPSLT_NROWS*NCOLS
SETPAD(2) ;NPADS
XWD -=18,1 ;PADLET
XWD -2,1 ;PADPIN
=8 ;FRACTN
ITS,<=400;>0 ;WRAPMG
ITS,<=1500;>=1000 ;POSTMG
=250 ;NEXTR
CHECK W941TV,WTVLEN
^W940TV__. ;TRANSFER VECTOR FOR QUAD HEIGHT DEC BOARDS
-1 ;FLAGS IF WIRE WRAP OR PC BOARD
JRST CPOPJ ;THE W/W INIT ROUTINE
JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS
JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS
JRST DISTCB ;DISTANCE CALC ROUTINE
JRST FPWR ;FIND A POST WITH POWER
JRST FGND ;FIND A POST WITH GND
JRST MAPIT ;CONVERT POST INTO X,Y,BITS
JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE
JRST GNDCLR ;?
JRST WAGGND ;?
JRST GNDOUT ;?
JRST VCCOUT ;?
=10 ;NROWS FOR QUAD HEIGHT
5 ;NCOLS
0 ;NCLPRG
0 ;NRWPRP
=50 ;DIPSLT
SETPAD(4) ;NPADS
XWD -=18,1 ;PADLET
XWD -2,1 ;PADPIN
=8 ;FRACTN
ITS,<=400;>0 ;WRAPMG
ITS,<=1500;>=1000 ;POSTMG
=250 ;NEXTR
CHECK W940TV,WTVLEN
CONOFF__=57*=125
XFDG__=250
MAPRC: SKIPE LNGRID ;IF LNGRID SET,
JRST [ TDNE T,[777700,,770000]
POPJ P,
HLRZ TT,T ;THEN RC IS LN
MOVNS T
ADD T,NCOLS
ADDI T,1 ;REVERSE COLUMNS
DPB TT,[POINT 24,T,23]
JRST CPOPJ1]
HLRZ TT,T
CAMLE TT,NROWS
POPJ P,
HRRZ T,T
CAMLE T,NCOLS
POPJ P,
IMUL TT,NCOLS
SUB T,NCOLS
ADDI T,(TT)
HRRZ TT,L2N+"E"
LSH TT,14
IOR T,TT
JRST CPOPJ1
;MAP NUMBERS IN T, TT, AND TTT INTO EDGE PIN NAME
MAPPAD: LSH T,14
LSH TT,6
IOR T,TT
IOR T,TTT
POPJ P,
PINMAP: PUSHJ P,MAPIT
JRST PINERR
JRST CONERR
JRST CPOPJ1
PINBIT: PUSHJ P,MAPIT
JFCL
SETZ TT,
POPJ P,
MAPIT: JUMPL A,CONMAP ;IS IT A CONNECTOR PIN?
LDB T,[POINT 6,A,23] ;GET LOC LETTER
LDB TT,[POINT 12,A,35] ;GET LOC NUMBER
JUMPE TT,CPOPJ ;0 IS A NO,NO
SKIPE LNGRID ;LETTER NUMBER GRID?
JRST LNGMAP ;YES, DIFFERENT MAPPING
MOVE TTT,N2L(T) ;GET LETTER
CAIE TTT,"E" ;IT'S GOT TO BE AN "E" OR ITS WRONG
POPJ P,
LNGMPD: CAMLE TT,DIPSLT ;THATS TOO BIG
POPJ P,
MOVE T,DIPLOC-1(TT) ;PUT XY IN T
LDB TT,[POINT 6,A,17] ;GET THE PIN #
TLNE A,MAPPWR!MAPGND ;POWER OR GROUND PIN?
JRST PINPGP
CAIN B,=14 ;I KNOW WHICH WAY 14 PIN DIPS GO IN TOO!
CAIG TT,7 ;WHICH MEANS PIN #'S GREATER THAN 7 ADD 2
JRST MAPIT0 ;NO
ADDI TT,2 ;YES, FUDGE PIN # BY 2
;I THINK I STILL NEED THIS!
ADD A,[2,,0] ;ALSO RETURN CORRECTED PIN # FOR DSTCLC
TLO A,PLUS2 ;AND INDICATE IT IS A PLUS 2 VERSION
MAPIT0: ADD T,PINTAB-1(TT) ;ADD EXTRA XY FOR PIN
MOVE TTT,DETAB-1(TT) ;GET DISTANCE TO END OF DIP PATTERN (SHORTEST)
SETZ TT, ;NO AUTOMATIC GND OR PWR
JRST CPOPJ2
LNGMAP: CAMLE T,NROWS
POPJ P,
IMUL T,NCOLS
SUBI T,-1(TT)
MOVE TT,T
JRST LNGMPD
PINPGP: JUMPN TT,CPOPJ ;PIN FIELD SHOULD BE CLEAR
ADD T,[=8*=125,,0] ;BOTH GET THIS
TLNN A,MAPPWR ;POWER?
JRST [ MOVSI TT,GND ;NO, RETURN GND BIT
SETZ TTT, ;AT END
JRST CPOPJ2]
SUBI T,6*=125 ;YES, IT IS UP THIS MUCH
MOVSI TT,PWR
SETZ TTT,
JRST CPOPJ2
CONMAP: AOS (P)
LDB T,[POINT 6,A,29] ;GET PIN LETTER
MOVEM T,LETTER#
CAILE T,=18 ;LEGAL?
POPJ P,
SUBI T,1 ;NORMALIZE TO 0
IMULI T,=125 ;GENERATE Y POSITION
LDB TT,[POINT 6,A,23] ;GET PADDLE
JUMPLE TT,CPOPJ
CAMLE TT,NPADS
POPJ P,
ADD T,YFDG-1(TT)
LDB TT,[POINT 6,A,35] ;GET SIDE
MOVEM TT,SIDE#
SOJL TT,CPOPJ ;FUDGE IT AND CHECK FOR LEGAL
CAILE TT,1 ;TOO BIG?
POPJ P,
LSH TT,1
LDB TTT,[POINT 1,A,29] ;EVEN OR ODD CONNECTOR PIN
TRC TTT,1
IOR TT,TTT
IMULI TT,XFDG
ADDI TT,CONOFF
HRL T,TT
MOVE TT,LETTER
LSH TT,2
IOR TT,SIDE
VGCON1: CAIN TT,<1*4>+2 ;CHECK FOR POWER AND GROUND PINS
MOVSI TT,PWR
CAIN TT,<3*4>+2
MOVSI TT,GND
CAIN TT,<=16*4>+1
MOVSI TT,GND
SETZ TTT, ;NO SHORTEST DISTANCE TO END OF DIP!
JRST CPOPJ1
VGCON: LDB TT,[POINT 8,A,31]
TRO TT,1
TRNE A,2
ADDI TT,1
JRST VGCON1
PINERR: LDB T,[POINT 6,A,23]
OUTCHR N2L(T)
LDB T,[POINT 12,A,35]
PUSHJ P,NUMPNT
OUTCHR["("]
LDB T,[POINT 6,A,17]
LSTNUM: PUSHJ P,NUMPNT
OUTSTR[ASCIZ/) MAPPING ERROR!
/]
POPJ P,
CONERR: LDB T,[POINT 6,A,23]
OUTCHR N2L(T)
OUTCHR["("]
LDB T,[POINT 6,A,29]
OUTCHR N2L(T)
LDB T,[POINT 6,A,35]
JRST LSTNUM
;FIND POWER AND GROUND PINS
FPWR: JUMPL A,FPWRC
TLZ A,$$PINN ;CLEAR PIN FIELD
TLO A,MAPPWR ;AND SET MAPPWR BIT
POPJ P,
FPWRC: TRZ A,7777 ;CLEAR THIS PART
HRRZ T,"A"+L2N
LSH T,6
TRO A,2(T) ;SET AS A2
POPJ P,
FGND: JUMPL A,FGNDC
TLZ A,$$PINN
TLO A,MAPGND ;MAKE IT "G" PIN
POPJ P,
FGNDC: LDB T,[POINT 6,A,29] ;GET LETTER
TRZ A,7777 ;CLEAR THIS
CAMG T,"K"+L2N ;SHOULD ONLY LOOK AT RH, BUT SIGN BIT PROBABLY ISN'T ON FOR "K"
JRST [ HRRZ T,"C"+L2N
LSH T,6
TRO T,2 ;C2
JRST FGNDC1]
HRRZ T,"T"+L2N
LSH T,6
TRO T,1 ;T1
FGNDC1: TRO A,(T)
POPJ P,
PGPRTM: SETOM PMINUS#
CAIA
PGPRNT: SETZM PMINUS
LDB T,[POINT 6,A,23]
PUTBYT @N2L(T)
JUMPL A,PGCPNT
LDB T,[POINT 12,A,35]
PUSHJ P,DECOUT
PUTBYT "("
TLNN A,MAPPWR!MAPGND
JRST NPGPNT
TLNN A,MAPPWR
SKIPA T,["G"]
MOVEI T,"V"
PUTBYT @T
PGPN1: PUTBYT ")"
POPJ P,
NPGPNT: LDB T,[%%PINN,,A]
SKIPN PMINUS
JRST NPGPN1
TLNE A,PLUS1
JRST [ PUSHJ P,DECOUT
PUTBYT "-"
JRST PGPN1]
TLNE A,PLUS2
CAIG T,7
JRST PGPN0
PUSHJ P,DECOUT
PUTSTR[ASCIZ/-2/]
JRST PGPN1
NPGPN1: TLNE A,PLUS1
SOJA T,PGPN2
CAIG T,7
JRST [PGPN0: PUSHJ P,DECOUT ;LESS THAN 8 AND NOT PLUS1 FORM, NO + AT ALL
JRST PGPN1]
TLNE A,PLUS2
SUBI T,2
PGPN2: PUSHJ P,DECOUT
TLNE A,PLUS1
PUTBYT "+"
TLNE A,PLUS2
PUTSTR[ASCIZ/+2/]
JRST PGPN1
PGCPNT: PUTBYT "("
LDB T,[POINT 6,A,29]
PUTBYT @N2L(T)
LDB T,[POINT 6,A,35]
PUSHJ P,DECOUT
JRST PGPN1
GNDCLR: OUTSTR[ASCIZ/YOU CAN'T PUT 24 PIN DIPS ON DEC CARDS!
/]
POPJ P,
WAGGND: MOVSI B,-GNDLEN
WGLOP: HLRZ TTT,GNDNAM(B) ;PICK UP SIDE NUMBER
JUMPE TTT,WGLOP1
PUTSTR[ASCIZ/777777000000000000/];CPIN ID OF -1, NO FILE NAME
LDB TTT,[POINT 7,GNDNAM(B),6] ;PADDLE LETTER
HRRZ T,L2N(TTT)
IMULI T,=100
LDB TTT,[POINT 7,GNDNAM(B),6]
HRRZ TTT,L2N(TTT)
LSH TTT,1
ADD T,TTT
HRRZ TTT,GNDNAM(B)
ANDI TTT,1
SUB T,TTT
PUSHJ P,DECOUT ;GUARANTEED TO BE 3 DIGITS
PUTSTR[ASCIZ/ 3/] ;MARK AS GROUND
PUSHJ P,F4CRLF
WGLOP1: AOBJN B,WGLOP
MOVSI B,-VCCLEN
VCCLOP: HLRZ TTT,VCCNAM(B) ;PICK UP SIDE NUMBER
JUMPE TTT,VCCLP1
PUTSTR[ASCIZ/777777000000000000/];CPIN ID OF -1, NO FILE NAME
LDB TTT,[POINT 7,VCCNAM(B),6] ;PADDLE LETTER
HRRZ T,L2N(TTT)
IMULI T,=100
LDB TTT,[POINT 7,VCCNAM(B),6]
HRRZ TTT,L2N(TTT)
LSH TTT,1
ADD T,TTT
HRRZ TTT,VCCNAM(B)
ANDI TTT,1
SUB T,TTT
PUSHJ P,DECOUT ;GUARANTEED TO BE EXACTLY 3 DIGITS
PUTSTR[ASCIZ/ 2/] ;MARK AS VCC
PUSHJ P,F4CRLF
VCCLP1: AOBJN B,VCCLOP
POPJ P,
;FORMAT:
; 777777000000000000NNN M
;NNN = PADDLE # * 100 + PIN * 2 - (SIDE MOD 2)
;M = 2 FOR VCC, 3 FOR GND
GNDOUT: MOVSI A,-GNDLEN
JRST GNDO2
GNDO0: TRNN A,3 ;MULTIPLE OF 4?
JRST GNDO1
PUTBYT 11
JRST GNDO2
GNDO1: PUTSTR[ASCIZ/
/]
GNDO2: HLLZ T,GNDNAM(A)
JUMPE T,[PUTBYT "E"
MOVE T,GNDNAM(A)
PUSHJ P,DECOUT
PUTSTR[ASCIZ/(G)/]
JRST GNDO3]
LDB TTT,[POINT 7,GNDNAM(A),6]
XCT PUTCHR
PUTBYT "("
LDB TTT,[POINT 7,GNDNAM(A),13]
XCT PUTCHR
HRRZ T,GNDNAM(A)
PUSHJ P,DECOUT
PUTBYT ")"
GNDO3: PUTBYT 11
HLRE T,GNDTAB(A)
PUSHJ P,MILOUT
PUTBYT ","
HRRE T,GNDTAB(A)
PUSHJ P,MILOUT
AOBJN A,GNDO0
PUTSTR[BYTE(7)15,14]
POPJ P,
VCCOUT: MOVSI A,-VCCLEN
JRST VCCO2
VCCO0: TRNN A,3 ;MULTIPLE OF 4?
JRST VCCO1
PUTBYT 11
JRST VCCO2
VCCO1: PUTSTR[ASCIZ/
/]
VCCO2: HLLZ T,VCCNAM(A)
JUMPE T,[PUTBYT "E"
MOVE T,VCCNAM(A)
PUSHJ P,DECOUT
PUTSTR[ASCIZ/(V)/]
JRST VCCO3]
LDB TTT,[POINT 7,VCCNAM(A),6]
XCT PUTCHR
PUTBYT "("
LDB TTT,[POINT 7,VCCNAM(A),13]
XCT PUTCHR
HRRZ T,VCCNAM(A)
PUSHJ P,DECOUT
PUTBYT ")"
VCCO3: PUTBYT 11
HLRE T,VCCTAB(A)
PUSHJ P,MILOUT
PUTBYT ","
HRRE T,VCCTAB(A)
PUSHJ P,MILOUT
AOBJN A,VCCO0
PUTSTR[BYTE(7)15,14]
POPJ P,
;TABLES
RADIX =10
DEFINE F(I)
<<I*125>>
DEFINE XY(A,B,SECTION)
< <XWD A*125,0>+B*125+5250*SECTION
>
DEFINE ONESECTION(SECTION)
< XY(41,6,SECTION)
XY(31,6,SECTION)
XY(20,6,SECTION)
XY(10,6,SECTION)
XY(0,6,SECTION)
XY(41,14,SECTION)
XY(31,14,SECTION)
XY(20,14,SECTION)
XY(10,14,SECTION)
XY(0,14,SECTION)
XY(41,22,SECTION)
XY(31,22,SECTION)
XY(20,22,SECTION)
XY(10,22,SECTION)
XY(0,22,SECTION)
XY(41,30,SECTION)
XY(31,30,SECTION)
XY(20,30,SECTION)
XY(10,30,SECTION)
XY(0,30,SECTION)
XY(41,38,SECTION)
XY(31,38,SECTION)
XY(20,38,SECTION)
XY(10,38,SECTION)
XY(0,38,SECTION)
>
DIPLOC: ONESECTION(0) ;DOUBLE HEIGHT
ONESECTION(1) ;QUAD
ONESECTION(2) ;HEX
PINTAB: XY(0,0,0)
XY(1,0,0)
XY(2,0,0)
XY(3,0,0)
XY(4,0,0)
XY(5,0,0)
XY(6,0,0)
XY(7,0,0)
XY(7,-6,0)
XY(6,-6,0)
XY(5,-6,0)
XY(4,-6,0)
XY(3,-6,0)
XY(2,-6,0)
XY(1,-6,0)
XY(0,-6,0)
DEFINE DIST(A)
< A*125
>
DETAB: DIST(0)
DIST(1)
DIST(2)
DIST(3)
DIST(4)
DIST(3)
DIST(2)
DIST(1)
DIST(1)
DIST(2)
DIST(3)
DIST(4)
DIST(3)
DIST(2)
DIST(1)
DIST(0)
YFDG:
FOR I_0,5
< I*=21*=125
>
;GROUND AND POWER PINS
DEFINE PINS
< ONEPINS(0)
ONEPINS(1)
ONEPINS(2)
>
DEFINE ONEPINS(SECTION)
<
VGMAC(SECTION,8,6,5)
VGMAC(SECTION,8,14,10)
VGMAC(SECTION,8,22,15)
VGMAC(SECTION,8,30,20)
VGMAC(SECTION,8,38,25)
VGMAC(SECTION,18,6,4)
VGMAC(SECTION,18,14,9)
VGMAC(SECTION,18,22,14)
VGMAC(SECTION,18,30,19)
VGMAC(SECTION,18,38,24)
VGMAC(SECTION,28,06,3)
VGMAC(SECTION,28,14,8)
VGMAC(SECTION,28,22,13)
VGMAC(SECTION,28,30,18)
VGMAC(SECTION,28,38,23)
VGMAC(SECTION,39,06,2)
VGMAC(SECTION,39,14,7)
VGMAC(SECTION,39,22,12)
VGMAC(SECTION,39,30,17)
VGMAC(SECTION,39,38,22)
VGMAC(SECTION,49,06,1)
VGMAC(SECTION,49,14,6)
VGMAC(SECTION,49,22,11)
VGMAC(SECTION,49,30,16)
VGMAC(SECTION,49,38,21)
VGCMAC(SECTION,53,2,A,C,2)
VGCMAC(SECTION,55,15,A,T,1)
VGCMAC(SECTION,53,23,B,C,2)
VGCMAC(SECTION,55,36,B,T,1)
>
DEFINE VGMAC(A,B,C,D)
< XY(B,C,A)
>
DEFINE VGCMAC(A,B,C,D,E,F)
< XY(B,C,A)
>
GNDTAB: PINS
GNDLEN__.-GNDTAB
DEFINE VGMAC(A,B,C,D)
< D
>
DEFINE VGCMAC(A,B,C,D,E,F)
< <BYTE(7)"D"+2*A,"E">+F
>
GNDNAM: PINS
DEFINE ONEPINS(SECTION)
<
VGMAC(SECTION,8,0,5)
VGMAC(SECTION,8,8,10)
VGMAC(SECTION,8,16,15)
VGMAC(SECTION,8,24,20)
VGMAC(SECTION,8,32,25)
VGMAC(SECTION,18,0,4)
VGMAC(SECTION,18,8,9)
VGMAC(SECTION,18,16,14)
VGMAC(SECTION,18,24,19)
VGMAC(SECTION,18,32,24)
VGMAC(SECTION,28,0,3)
VGMAC(SECTION,28,8,8)
VGMAC(SECTION,28,61,13)
VGMAC(SECTION,28,24,18)
VGMAC(SECTION,28,32,23)
VGMAC(SECTION,39,0,2)
VGMAC(SECTION,39,8,7)
VGMAC(SECTION,39,16,12)
VGMAC(SECTION,39,24,17)
VGMAC(SECTION,39,32,22)
VGMAC(SECTION,49,0,1)
VGMAC(SECTION,49,8,6)
VGMAC(SECTION,49,16,11)
VGMAC(SECTION,49,24,16)
VGMAC(SECTION,49,32,21)
VGCMAC(SECTION,57,0,A,A,2)
VGCMAC(SECTION,57,21,B,A,2)
>
DEFINE VGMAC(A,B,C,D)
< XY(B,C,A)
>
DEFINE VGCMAC(A,B,C,D,E,F)
< XY(B,C,A)
>
VCCTAB: PINS
VCCLEN__.-VCCTAB
DEFINE VGMAC(A,B,C,D)
< D
>
DEFINE VGCMAC(A,B,C,D,E,F)
< <BYTE(7)"D"+2*A,"E">+F
>
VCCNAM: PINS
RADIX 8
BEGIN WW946
;PIN DATA STRUCTURE SAME AS OTHER DEC BOARDS
^W946TV:
-1 ;FLAGS IF WIRE WRAP OR PC BOARD
JRST W946IN ;THE W/W INIT ROUTINE
JRST MAPRC ;MAP ROW/COLS INTO GENERATED LOCS
JRST MAPPAD ;MAP PADDLE/LETTER/SIDE INTO CONN LOCS
JRST DISTCB ;DISTANCE CALC ROUTINE
JRST FPWR ;FIND A POST WITH POWER
JRST FGND ;FIND A POST WITH GND
JRST MAPIT ;CONVERT POST INTO X,Y,BITS
JRST PAKSIZ ;FIND DIMENSION OF DIP OUTLINE
JRST GNDCLR ;?
JRST WAGGND ;?
JRST GNDOUT ;?
JRST VCCOUT ;?
=18 ;NROWS
6 ;NCOLS
0 ;NCLPRG
0 ;NRWPRP
=108 ;DIPSLT=NROWS*NCOLS
SETPAD(6) ;NPADS
XWD -=18,1 ;PADLET
XWD -2,1 ;PADPIN
=8 ;FRACTN
ITS,<=400;>=500 ;WRAPMG--TOTAL FOR BOTH ENDS OF RUN!!
ITS,<=1500;>=2000 ;POSTMG--"
=250 ;NEXTR
CHECK W946TV,WTVLEN
W946IN: SETOM LNGRID
SETOM WIRGND
POPJ P,
;MAPIT, PINMAP, PINBIT, MAPRC, PINPGP, CONMAP
MAPRC: TDNE T,[777700,,770000] ;ROW,,COLUMN FROM UML ROUTINE IN T
POPJ P, ;BLESS THE RC FROM UML
MOVSS T ;PUT THE ROW FROM UML INTO THE NUMBER POSITION
HLRZ TT,T ;PUT THE COLUMN FROM UML INTO RIGHT SIDE OF TT
MOVNS TT ;AND MUNG THE COLUMN LETTER SO TED LIKES IT
ADDI TT,1
ADD TT,NCOLS
DPB TT,[POINT 24,T,23] ; SO IT CAN BE STUFFED INTO THE LOC LETTER FIELD
JRST CPOPJ1
PINMAP: PUSHJ P,MAPIT
JRST PINERR
JRST CONERR
JRST CPOPJ1
PINBIT: PUSHJ P,MAPIT
JFCL
SETZ TT,
POPJ P,
MAPIT: JUMPL A,CONMAP ;IS IT A CONNECTOR PIN?
LDB T,[POINT 6,A,23] ;GET LOC LETTER (COLUMN A-F)
LDB TT,[POINT 12,A,35] ;GET LOC NUMBER (ROW 1-18)
JUMPE TT,CPOPJ ;0 IS A NO,NO
CAMLE T,NCOLS ;CHECK FOR OUT OF BOUNDS
POPJ P,
CAMLE TT,NROWS
POPJ P,
;PUT XY IN T:
SUBI T,1 ;T_COL-1
IMULI T,=1125 ;T_(COL-1)*INTER.COLUMN.SPACING
SUBI TT,1 ;TT_ROW-1
IDIVI TT,6 ;TT_(ROW-1) DIV 6, TTT_(ROW-1) MOD 6
IMULI TT,=5250 ;TT_((ROW-1) DIV 6)*INTER.PATTERN.SPACING
IMULI TTT,=750 ;TTT_((ROW-1) MOD 6)*INTER.ROW.SPACING
ADDI TT,=250(TTT) ;DIP PATTERN STARTS INSIDE OF CONNECTOR PATTERN
HRLZS T ; ON THIS TURKEY CARD.
HRR T,TT ;MOVE X TO LHW(T), Y TO RHW(T)
LDB TT,[POINT 6,A,17] ;GET THE PIN #
TLNE A,MAPPWR!MAPGND ;POWER OR GROUND PIN?
JRST PINPGP
CAIN B,=14 ;I KNOW WHICH WAY 14 PIN DIPS GO IN TOO!
CAIG TT,7 ;WHICH MEANS PIN #'S GREATER THAN 7 ADD 2
JRST MAPIT0 ;NO (14 PIN DIPS NORMALLY GET MUNGED BEFORE THEY GET HERE)
ADDI TT,2 ;YES, FUDGE PIN # BY 2
;I THINK I STILL NEED THIS! (I BET NONE OF THIS CODE EVER GETS EXECUTED-TAG)
ADD A,[2,,0] ;ALSO RETURN CORRECTED PIN # FOR DSTCLC
TLO A,PLUS2 ;AND INDICATE IT IS A PLUS 2 VERSION
MAPIT0: PUSH P,TT
CAIG TT,=8 ;CALCULATE EXTRA XY FOR PIN-DIPLOC IS XY OF PIN 16
JRST MAPIT1 ;DO IT DIFFERENT IF PIN IS 8 OR LESS
MOVEI TTT,=16 ;PIN IS 9-16, NEEDS NO Y CORRECTION
SUB TTT,TT ;GET #PINS FROM PIN 16
IMULI TTT,=125 ;MULTIPLY BY INTERPIN SPACING
HRLZ TT,TTT ;LINE IT UP WITH X IN T
MAPIT3: ADD T,TT ;FIX T
POP P,TT
MOVE TTT,DETAB-1(TT) ;GET DISTANCE TO END OF DIP PATTERN (SHORTEST)
SETZ TT, ;NO AUTOMATIC GND OR PWR
JRST CPOPJ2
MAPIT1: SUBI TT,1 ;PIN IS 8 OR LESS, GET #PINS FROM PIN 1
IMULI TT,=125 ;CONVERT TO MILS
HRLZS TT ;LINE UP WITH X IN T
HRRI TT,=625 ;INCLUDE INTERROW SPACING
JRST MAPIT3
PINPGP: JUMPN TT,CPOPJ ;PIN FIELD SHOULD BE CLEAR
TRNN A,10000 ;IS COLUMN A,C, OR E? (ODD COLUMNS GET DIFFERENT
JRST EVENCL ;POWER AND GROUND TREATMENT)
ADD T,[=8*=125,,0] ;BOTH GET THIS
TLNN A,MAPPWR ;POWER?
JRST [ MOVSI TT,GND ;NO, RETURN GND BIT
ADDI T,=625 ;AND FUDGE Y
SETZ TTT, ;AT END OF PATTERN
JRST CPOPJ2]
MOVSI TT,PWR
SETZ TTT,
JRST CPOPJ2
EVENCL: TLNN A,MAPPWR ;POWER?
JRST [ MOVSI TT,GND ;MAKE INTO PHANTOM GND PIN IN SAME PLACE AS PIN 8
ADD T,[7*=125,,=625]
SETZ TTT,
JRST CPOPJ2]
MOVSI TT,PWR
SUB T,[=125,,0] ;MAP TO POWER PIN BETWEEN SOCKETS
SETZ TTT,
JRST CPOPJ2
CONMAP: AOS (P)
LDB TT,[POINT 6,A,23] ;GET PADDLE
CAMLE TT,NPADS ;TOO LARGE?
POPJ P,
SOJL TT,CPOPJ ;NORMALIZE & CHECK FOR TOO SMALL
MOVEM TT,SAVPAD#
LDB T,[POINT 6,A,29] ;GET PIN
MOVEM T,LETTER#
CAILE T,=18 ;LEGAL?
POPJ P,
SOJL T,CPOPJ ;NORMALIZE AND CHECK
TRNE TT,1 ;SKIP UNLESS WE'RE ON PADDLE B, C, OR F
ADDI T,=18 ;CPIN PATTERN REPEATS EVERY TWO PADDLES ON A W946
LDB TT,[POINT 6,A,35] ;GET SIDE
MOVEM TT,SIDE#
SOJL TT,CPOPJ ;NORMALIZE AND CHECK
CAILE TT,1 ;TOO BIG?
POPJ P,
CAIE TT, ;IF WE'RE ON SIDE 2,
ADDI T,=36 ;THEN INDEX TO SIDE TWO PORTION OF CPIN TABLE
MOVE T,CPINTB(T) ;GET X,Y OF CPIN RELATIVE TO AA2
ADD T,[=6750,,0] ;ADD OFFSET OF AA2
MOVE TT,SAVPAD ;GET PADDLE AGAIN
ADD T,YFDG(TT) ;ADD PADDLE Y OFFSET
MOVE TT,LETTER ;SET UP FOR VGCON1
LSH TT,2
IOR TT,SIDE
VGCON1: CAIN TT,<1*4>+2 ;CHECK FOR POWER AND GROUND PINS (A2,C2,OR T1)
MOVSI TT,PWR
CAIN TT,<3*4>+2
MOVSI TT,GND
CAIN TT,<=16*4>+1
MOVSI TT,GND
SETZ TTT, ;TTT OTHER THAN ZERO HAS NO MEANING FOR CPIN
JRST CPOPJ1
VGCON: LDB TT,[POINT 8,A,31]
TRO TT,1
TRNE A,2
ADDI TT,1
JRST VGCON1
FOR NAME (GNDCLR,WAGGND,GNDOUT,VCCOUT)
<NAME: OUTSTR [ASCIZ /NAME NOT IMPLEMENTED FOR W946!
/]
JRST ERRET
>
;TABLES FOR W946
RADIX =10
DEFINE XY(X,Y)<XWD 125*X,125*Y>
DEFINE Y(Y)<XWD 0,125*Y>
CPINTB: XY(3,1) ;AA1
XY(1,1) ;AB1
XY(3,3) ;AC1
XY(1,3) ;AD1
XY(3,5) ;AE1
XY(1,5) ;AF1
XY(3,7) ;AH1
XY(1,7) ;AJ1
XY(3,9) ;AK1
XY(1,9) ;AL1
XY(3,11);AM1
XY(1,11);AN1
XY(3,13);AP1
XY(1,13);AR1
XY(3,15);AS1
XY(1,15);AT1
XY(1,18);AU1 YEAH, IT'S SCREWY, ALL RIGHT.
XY(2,18);AV1
XY(3,20);BA1
XY(1,20);BB1
XY(3,22);BC1
XY(1,22);BD1
XY(3,24);BE1
XY(1,24);BF1
XY(3,26);BH1
XY(1,26);BJ1
XY(3,28);BK1
XY(1,28);BL1
XY(3,30);BM1
XY(1,30);BN1
XY(3,32);BP1
XY(1,32);BR1
XY(3,34);BS1
XY(1,34);BT1
XY(3,37);BU1 HICCUP
XY(1,37);BV1
Y(0) ;AA2
Y(1) ;AB2
Y(2) ;AC2
Y(3) ;AD2
Y(4) ;AE2
Y(5) ;AF2
Y(6) ;AH2
Y(7) ;AJ2
Y(8) ;AK2
Y(9) ;AL2
Y(10) ;AM2
Y(11) ;AN2
Y(12) ;AP2
Y(13) ;AR2
Y(14) ;AS2
Y(15) ;AT2
Y(17) ;AU2 HICCUP
Y(18) ;AV2
Y(20) ;BA2
Y(21) ;BB2
Y(22) ;BC2
Y(23) ;BD2
Y(24) ;BE2
Y(25) ;BF2
Y(26) ;BH2
Y(27) ;BJ2
Y(28) ;BK2
Y(29) ;BL2
Y(30) ;BM2
Y(31) ;BN2
Y(32) ;BP2
Y(33) ;BR2
Y(34) ;BS2
Y(35) ;BT2
Y(37) ;BU2 HICCUP
Y(38) ;BV2
YFDG: 0
0
=5250
=5250
=10500
=10500
RADIX 8
BEND WW946
^W946TV__W946TV
BEND WW940
>;MWL
>;MDWL

16
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@@ -0,0 +1,16 @@
title boards
;;For producing separate REL boards file for WL
COMMENT 
.XCREF A,B,C,D,E,F,G,H,M,P,T,TT,TTT

.insert WLDEFS
.insert BOARD0
XLIST
LIT
STORAGE(IMPURE)
VAR
LIST
END

17
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COMMENT 
.XCREF A,B,C,D,E,F,G,H,I,L,P,T,TT,TTT,W,FETCH

.insert wldefs
.INSERT WLFST
.INSERT WLIN
.INSERT WLOUT1
.INSERT WLOUT2
;.INSERT WLRDC
.INSERT WLDIP
.INSERT WLROUT
.INSERT SIGSUB
;.insert board0
; Load this with the WBOARDS.REL
.INSERT WLLAST

5
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@@ -0,0 +1,5 @@
MSAIL;JOBDAT$L
MWL;WL$L
MWL;WBOARD$L
1?
JWL$TD

13
src/wl/wl.login Normal file
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@@ -0,0 +1,13 @@
:STINK WL
1L DECSYS;DECBOT BIN
.JBSA/STRT
56/107
:
********* OK, now do the following *********
:DELETE DATDRW;NODIPS OBIN
:RENAME DATDRW;NODIPS BIN, NODIPS OBIN
:PDUMP DATDRW;NODIPS BIN ; This is the file linked to by SYS1;TS NODIPS
:GO
"TOP MODE"
XRESIDENT ;read in NDIPS.DIP and dump it out


344
src/wl/wldefs.5 Normal file
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DEFINE SETSW $ (NAME,DEFVAL)
< IFNDEF NAME$SW,<NAME$SW__IFIDN <DEFVAL> <> <0;>DEFVAL
>
NAME$SW__NAME$SW
>
DEFINE ONOFSW $ (NAME)
< IFN NAME$SW,<NAME$SW__-1> ;MAKE IT NICE FOR  AND 
>
DEFINE DEFSW $ (NAME)
< DEFINE NAME,<IFN NAME$SW>
DEFINE NO$NAME,<IFE NAME$SW>
>
DEFINE MAKESW(NAME,VAL)
< SETSW(NAME,VAL)
ONOFSW(NAME)
DEFSW(NAME)
>
MAKESW(STAN)
MAKESW(DEC)
MAKESW(CMU)
MAKESW(ITS)
MAKESW(III)
DEFINE STANFO,<STAN> ;LONG FORM FOR HYSTERICAL RAISINS
DEFINE CHECK $ (SITE,VAR) <IFDEF VAR,<SITE$SW__-1;>>
IFE STANSW!DECSW!CMUSW!ITSSW!IIISW,<
;IF NO SITE SET MANUALLY ABOVE, WE MUST DECIDE FOR OURSELVES WHERE WE ARE
CHECK(ITS,.IOT) CHECK(CMU,CMUDEC) CHECK(STAN,SPWBUT) DECSW__-1
>
DEFINE MOR (A)
<TMPSW__0
FOR B IN (A)
< B,<TMPSW__-1>
>
IFN TMPSW>
DEFINE MWL,<IFE 0> ;THIS IS WL
DEFINE MPC,<IFN 0> ;NOT PC
DEFINE MD,<IFN 0> ;OR D
DEFINE MDPC,<IFN 0>
MAKESW(ROUTE,-1) ;WIRE WRAP ROUTER -- OPTIMIZES RUNS
NODEC,<VIROSSW__0>
MAKESW(VIROS,-1)
MAKESW(USAGE,-1) ;FREE STORAGE USAGE COUNTERS
MAKESW(DECOS,DECSW!CMUSW!IIISW) ;SITE HAS DEC LIKE OPERATING SYSTEM
MAKESW(TTYBT,DECOSSW) ;SITE CAN SET TTY BREAK TABLE
MAKESW(ESCMP,DECSW!CMUSW!IIISW) ;MUST MAP ESCAPES FROM TTY INTO ALTMODES
;YOU ONLY NEED THIS IF 176, 175, AND 33 ARE ALL ALTMODE
MAKESW(SKEY,DECSW!IIISW) ;SKEYSW=1 FOR STANDARD ASCII KEYBOARDS WHICH
;REQUIRE TRANSLATING ALTMODES TO CTRL AND META
;AC DEFS
EXTERNAL .JBFF,.JBSA,.JBSYM,.JBREL,.JBDDT,.JBOPC,.JBREN,.JBHRL
;AC0 FLAG BITS
FLAG__1 ;TEMPORARY FLAG BIT
ASCFLG__2 ;=1 ASCII INPUT =0 FULL WORD INPUT
PCNOTD__4 ;READING PC FILE, NOT D
CONLY__10 ;CONNECTOR INTERCONNECTIONS NEEDED ONLY
ISBACK__20 ;IS BACK PANEL LIST WE ARE DOING
;40 AVAILABLE
DOBEQ__100 ;DOING BACK PANEL EQUIVALENCES
DOALLC__200 ;DO ALL CARDS AT TTY PRINT
DOERRS__400 ;DOING ERROR SUMMARY
DOWIE__1000 ;DOING OUTPUT OF WIRE LIST INPUT ERRORS
DOGIN__2000 ;INVENTING PIN NAMES FOR "U" PINS IN SIMPLE FILE
DOPRTL__4000 ;DOING PARTS LIST, NOT STUFF LISTING
DOPWR__10000 ;DO ALL PWR IN BSIMPLE
ROUTE,<DOROUT__100000 ;DOING OUTPUT OF WIRE LIST USING ROUTER>
REFLAG__200000 ;DO REFERENCE HACK IN 'WL' FILE
PETIT__400000 ;SPACES ARE SIGNIFICANT - PETIT SWITCH
;LEFT HALF BITS
NOT__1 ;NOT IN T
NOTT__2 ;NOT IN TT
TFLG__4 ;TEMPORARY FLAG
SEMFLG__10 ;SEMI COLON SEEN IN TILDANOT
NOFF__20 ;NO FORM FEED NEEDED WHEN HEADER GOES OUT
ASKHIM__40 ;ASK FLAG
DEC,<COMLIN__40000> ;ANY LINE OUTPUT SHOULD BE A COMMENT LINE
;I.E. PRECEEDED BY "/"
SIMTAB__100000 ;SIMULATE TABS WITH SPACES
DOLC__200000 ;DO LOADING AND COUNTS IN GATHER
BAKGAT__400000 ;TELLS GATHER THIS IS A BACK PANEL WIRE LIST
A_1
B_2
C_3
D_4
E_5
F_6
G_7
H_10
L_11 ;CURRENT ID LIST
W_12 ;CURRENT CARD LIST
T_13
TT_14
TTT_15
TTTT_16
P_17
;Parameters
;MAX NUMBER OF PADDLES FOR UML OUTPUT
MAXPAD__=64
;OPDEFS
OPDEF PUTSTR[1B8] ;OUTPUT STRING (VARIOUS TYPES)
OPDEF PUTSIX[2B8] ;PUTSIX ['']
OPDEF PUTBYT[3B8] ;PUTBYT CHAR
OPDEF ASK[4B8] ;ASK [ASCIZ //] - SKIPS TWICE ON Y
OPDEF ERRSTR[5B8] ;ERRSTR #,[ASCIZ //]
CMU,<
OPDEF CMUDEC [CALLI -2]
OPDEF DECCMU [CALLI -3]
>;CMU
ITS,<
OPDEF CALL [ 40B8]
OPDEF INIT [ 41B8]
OPDEF CALLI [ 47B8]
OPDEF OPEN [ 50B8]
OPDEF TTYUUO [ 51B8]
OPDEF RENAME [ 55B8]
OPDEF IN [ 56B8]
OPDEF OUT [ 57B8]
OPDEF SETSTS [ 60B8]
OPDEF STATO [ 61B8]
OPDEF GETSTS [ 62B8]
OPDEF STATZ [ 63B8]
OPDEF INBUF [ 64B8]
OPDEF OUTBUF [ 65B8]
OPDEF INPUT [ 66B8]
OPDEF OUTPUT [ 67B8]
OPDEF CLOSE [ 70B8]
OPDEF RELEASE [ 71B8]
OPDEF MTAPE [ 72B8]
OPDEF UGETF [ 73B8]
OPDEF USETI [ 74B8]
OPDEF USETO [ 75B8]
OPDEF LOOKUP [ 76B8]
OPDEF ENTER [ 77B8]
OPDEF UJEN [100B8]
OPDEF PTYUUO [711B8]
OPDEF PTWR1S [PTYUUO 7,]
OPDEF PTWRS9 [PTYUUO 12,]
OPDEF PTJOBX [PTYUUO 16,]
OPDEF DSKPPN [CALLI 400071]
OPDEF SWAP [CALLI 400004]
>;ITS
NOSTAN,<
OPDEF RESET[CALLI]
OPDEF DEVCHR[CALLI 4]
OPDEF CORE[CALLI 11]
OPDEF EXIT[CALLI 12]
OPDEF DATE[CALLI 14]
OPDEF MSTIME[CALLI 23]
OPDEF GETPPN [CALLI 24]
OPDEF INCHRW [TTYUUO 0,]
OPDEF OUTCHR [TTYUUO 1,]
OPDEF INCHRS [TTYUUO 2,]
OPDEF OUTSTR [TTYUUO 3,]
OPDEF INCHWL [TTYUUO 4,]
OPDEF INCHSL [TTYUUO 5,]
OPDEF GETLIN [TTYUUO 6,]
OPDEF SETLIN [TTYUUO 7,]
OPDEF RESCAN [TTYUUO 10,]
OPDEF CLRBFI [TTYUUO 11,]
OPDEF CLRBFO [TTYUUO 12,]
OPDEF INSKIP [TTYUUO 13,]
OPDEF SETACT [TTYUUO 15,]
>;NOSTAN
DECOS,<OPDEF DSKPPN[GETPPN]>
;ALL THE SPECIAL FORMS OF PUTSTR
OPDEF PUTSIG[PUTSTR 1,] ;OUTPUT, BUT CHECK FOR A/P
OPDEF PUTCOM[PUTSTR 2,] ;OUTPUT COMMENT ONLY
OPDEF BINSTR[PUTSTR 3,] ;OUTPUT TO FILE
OPDEF BINSIG[PUTSTR 4,] ;OUTPUT SIGNAL NAME (WITH A/P) TO FILE
OPDEF BINSGU[PUTSTR 5,] ;OUTPUT TO FILE, PREFIX GLOBAL CHARACTER
DEC,<OPDEF OUTSIG[PUTSTR 6,]> ;DEC MUST FIX SIGNAL NAME
NODEC,<OPDEF OUTSIG[OUTSTR]> ;STANFORD AND ITS CAN JUST PRINT
OPDEF PUTXGP[PUTSTR 7,] ;IMAGE OUTPUT TO XGP
;Simple macros
DEFINE CRLF
< PUTSTR[BYTE(7)15,12] >
;HAS TO BE EXACTLY 1 INSTRUCTION
DEFINE DIPCHECK<>
;JUST A MARKER
;For commenting things out
DEFINE NIL
<IFN 0,>
SUBTTL BITS
; BODY ENTRY (BBIT)
BTMP1__400000 ;TEMP MARK BIT
PRX2ND__200000 ;SECOND OCCURENCE OF THIS PRPX POINTER
BPACKP__100000 ;PACKAGE PROP OTHER THAN DEFAULT WAS SEEN
BWILD__1000 ;THIS IS A WILD CONNECTOR
BEDGE__400 ;EDGE PIN BODY
CBODY__BEDGE!BWILD ;CON BODY BITS
BANYPOS__200 ;INDICATES XPOS AND YPOS ARE VALID
BXPOSL__3 ;3 BITS WORTH
BXPOSB__4 ;4 FROM RIGHT
BYPOSL__2 ;2 BITS WORTH
BYPOSB__2 ;2 FROM RIGHT
;BITS FROM D WHICH MUST BE STORED IN BODY BITS ABOVE
;BITS IN PIN ENTRY IN WIRE LIST (PBIT)
PTMP1__400000 ;MARK BIT
PTMP2__200000 ;ANOTHER
TRMBTS__140000 ;TERMINATOR RULE BITS (FOR CON ONLY)
TRMBSZ__2 ;NUMBER OF BITS
TRMBPS__3 ;LOW ORDER BIT
CANYPOS__20000
;17400 POS BITS
CXPOSL__3
CXPOSB__12 ;DISTANCE FROM RIGHT EDGE OF HALFWORD
CYPOSL__2
CYPOSB__10 ;DISTANCE FROM RIGHT EDGE OF HALFWORD
DUP__200 ;THIS PIN IS A DUPLICATE OF ANOTHER PIN IN RUN
PIDPIN__100 ;NO PIN #, USED PID!
PSHARE__40 ;THIS INPUT LOAD IS ALREADY SHARED WITH ANOTHER PIN
INVENT__20 ;THIS IS AN INVENTED POWER OR GROUND PIN
;QBITS USED ONLY ON BP PINS
QBITS__37 ;BIT MASK TO GET QUALIFIER LETTER FROM THIS HALFWORD
;LSB OF BIT MASK MUST EQUAL 17
; IS FOR TABLE TEST INSIDE SIGSUB
;POINT BITS FROM DRAWING PROG ('WD' FILE)
DEFPIN__4000 ;THIS PIN IS DEFAULTED, NOT EXPLICIT (BODY PINS ONLY)
CPNBTS__6000 ;BITS FOR TERMINATOR RULES (CPINS ONLY)
CPNBPS__7 ;LOW ORDER BIT POS
CPNBSZ__2 ;# OF BITS
;BITS IN DPBIT, TBIT, AND CBIT (TYPE BITS)
INLD__400000 ;INPUT LOAD
OUTLD__200000 ;OUTPUT LOAD
NULLD__100000 ;NO LOADING AT PRESENT
GND__40000 ;GROUND CONNECTION
PWR__20000 ;POWER CONNECTION
VPWR__=500 ;TTL POWER
TRI__10000 ;TRI-STATE OUTPUT
SHARE__4000 ;SHARE INPUT LOAD BIT (OR EXTRA OUTPUT)
OPENC__2000 ;OPEN COLLECTOR OUTPUT
PULL__1000 ;THIS OUTPUT IS A PULLUP
ECL__400 ;ECL PIN
TTL__200 ;TTL PIN
CLK__100 ;CLK SEEN AS FIRST 3 CHARS OF USE
TERM__40 ;TERMINATOR PIN
FFOUT__20 ;FLIP-FLOP OUTPUT
DRVREQ__10 ;DRIVE REQUIRED FOR THIS INPUT
FFIN__4 ;FLIP-FLOP INPUT
ANYCON__1 ;THERE IS A CONNECTOR IN THIS RUN (NOT USED IN DPBIT)
;BITS FROM OLD VERSION DIP FILE
VEE__200 ;-5.5V ECL POWER
VEEVLT__-=520
OTTL__100 ;OLD TTL BIT
VBB__40 ;-1.5V ECL THRESHOLD
VBBVLT__-=150
VTT__20 ;-2V ECL TERMINATORS
VTTVLT__-=200
OCLK__10 ;OLD CLK BIT
ALLTYP__INLD!OUTLD!NULLD!GND!PWR!TRI!SHARE!OPENC!PULL!TERM ;ALL TYPE BITS
INBITS__INLD!SHARE!NULLD ;ALL INPUT BITS
;BITS IN WBIT (WIRE BITS)
SNC__400000 ;THIS WIRE HAS THE NAME "NC"
SHI__200000 ;THIS WIRE HAS THE NAME "HI"
SPWR__100000 ;THIS WIRE HAS THE NAME "VCC"
SGND__40000 ;THIS WIRE HAS THE NAME "GND"
SCANON__20000 ;THIS SIGNAL IS THE CANONICAL +5.00V
CABRUN__400 ;PUT C QUALIFIER ON EDGE PINS
WNULL__200 ;COMPLETELY NULL WIRE
WSINGL__100 ;WIRE WITH ONLY 1 PIN
GLB2__40 ;THIS IS THE SIGNAL TO COME OUT IN THE SIMPLE FILE
GLB1__20 ;THIS IS ONLY SIGNAL TO GO TO BACK PANEL
GENSIG__10 ;THIS IS A GENERATED SIGNAL
WTMP1__4 ;TEMP MARK BIT FOR WIRE HEADER
SIG1__2 ;THIS SIGNAL BLOCK IS THE FIRST OF A SET OF EQUIVALENT NAMES
NAM2ND__1 ;INTERNAL WIRE HEADER BIT FOR SECOND NON-EQUIVALENT NAME OF SIGNAL
SIGBIT__SNC!SHI!SPWR!SGND ;WIRE TYPE BITS
;RUN BITS FROM DRAWING PROG ('WD' FILE)
CABBDY__1 ;"CABLE" BODY PIN ON RUN
ROUTE,<
;BITS IN PNTBL WORD USED BY ROUTER
RPGPIN__400000 ;THIS IS A POWER OR GROUND PIN, IT IS NOT IN WIRE LIST
RERPIN__200000 ;THIS PIN IS IN ERROR IN SOME WAY, DON'T WIRE IT!
ROUMRK__100000 ;MARK BIT FOR ROUTER
;BITS 5-14 ORDER #
;BITS 15-17 "SCT" CHARS
>;ROUTE
;BITS IN PROPERTY VALUE BLOCKS
DEFPRP__400000 ;THIS IS THE DEFAULT PROPERTY AT THIS LEVEL
PARTNM__200000 ;THIS IS A PART NUMBER BLOCK
PNUSED__100000 ;THIS PART NUMBER BLOCK IN USE
NULVAL__40000 ;THIS IS A NULL VALUE STRING AND SHOULDN'T NORMALLY BE PRINTED
PRTMP1__1 ;TEMP MARK BIT
;BITS IN PLBK FOR PARTS LIST THREAD
PL2ND__400000 ;THIS IS SECOND OCCURENCE OF SAME PART NUMBER

2637
src/wl/wldip.329 Normal file

File diff suppressed because it is too large Load Diff

4495
src/wl/wlfst.517 Normal file

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2365
src/wl/wlin.332 Normal file

File diff suppressed because it is too large Load Diff

5
src/wl/wllast.300sav Executable file
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XLIST
LIT
LIST
END STRT

3420
src/wl/wlout1.504 Normal file

File diff suppressed because it is too large Load Diff

5194
src/wl/wlout2.513 Normal file

File diff suppressed because it is too large Load Diff

1899
src/wl/wlrout.523 Normal file

File diff suppressed because it is too large Load Diff