PDP-10.its/doc/ucode/u126.doc

U.DOC -- Third release, edit 126
January 16, 1976

Copyright 1976, Digital Equipment Corp., Maynard, Mass.


1.0    SUMMARY

1.1    Edit version 126 is the third release of U, the  KL10
       microcode.

1.2    U is not dependent on any  monitor,  but  because  of
       hardware   differences   between   the   various  -10
       processors, a monitor must be built specifically  for
       the  KL10.   It has been tested with the 6.02 monitor
       and the TOPS-20 version 1 monitor.  U has  no  DATE75
       dependencies.

       The following are known deficiencies in U 126:
          U 126  will  not  work  correctly  with  processor
       revision   levels   less   than  6.   This  will  not
       ordinarily be a problem, because this release is part
       of  rev 7a and rev 8, and should therefore be applied
       to machines already at rev 6;  if there is any  doubt
       whether  a  machine  has  been  kept up to ECO level,
       however, customers should check before  installing  U
       126.   The  symptom  of  this  failure is that the PC
       doesn't get loaded if a page  failure  occurs  on  an
       instruction  fetch,  and  therefore  the  instruction
       which preceeded the page failure gets performed again
       on return from the page fault handler.
          If rev 8 is installed U 126 is necessary.
          KLpaging does not work with the cache on,  because
       there  is  too  much  time  from  "REQ  SV.VMA"  till
       "RETURN0".  the fix (as yet untested or installed):
       =0
       PGRST2: BR/AR,AR_ARX,
           ARX_SV.ARX,J/PGRST3
          BR/AR,AR_ARX,SC_-SC-1,
           ARX_SV.ARX
       PGRST3: REQ SV.VMA
          SET ACCOUNT EN,RETURN0
       This bug does not matter for 2040 machines (they have
       no cache) and thus there is no need to fix it in this
       release.  It will be fixed in the next release.
          The  code  which  performs  START   and   CONTINUE
       functions  on  leaving  the  HALT loop is incorrectly
       coded, in that it sets the interrupt inhibit flag for
       one instruction.  This results in a processor hang at
       WGRANT if there is an interrupt request up  when  the
       processor  is  continued,  and  the first instruction
       after the  continue  is  an  i/o  instruction.   This
       should   be  fixed  in  DEFINE.MIC  by  setting  SPEC
       INSTR/CONT=0.  This fix  has  received  only  minimal
       testing.  It will be fixed in the next release.
U.DOC -- Third release, edit 126                      Page 2


       The following problems have been fixed:
          Race  if  page  fail  occurs  while  writing   FM.
       microcode patch eliminates most probable cause, which
       is page fail at nicond time while  writing  ac  other
       than  0.   it  does  not take care of the possibility
       that cond/fm write will glitch at instr 1777 time.
          Fixes in several places to set and  clear  account
       enable so as to get repeatable accounting measures of
       useful work done.  the  enable  is  now  cleared  for
       meter  update  cycles and KL page refill cycles.  the
       hardware already takes care of PI cycles.
          Spec change  to  exit  from  halt  loop,  so  that
       AR0-8=0  with  AR9-35  non-zero  loads  AR into PC to
       start processor.  this is  different  from  executing
       JRST because PC flags are cleared.
          Fix EIS to tolerate page fail on read of fill byte
       in MOVSRJ or binary to decimal conversion.
          Integrate  opcode   counting/timing   code   under
       conditionals.
          Fix parity error code  to  writeback  AR  on  read
       pause write error.
          Rewrite of DDIV, so that the no-divide test is  on
       the  most  significant  half  of the magnitude of the
       dividend, rather  than  the  magnitude  of  the  most
       significant  half.   in  the  process,  save time and
       space.  Also put  in  conditional  assembly  variable
       "WRTST"  to inhibit write test cycle for instructions
       which appear not to need it, and thus to  speed  them
       up.
          Fix the S-bus  diag  instruction.   (It  was  page
       faulting on the register function.)
          Recode string compare to save space and time.
       change defaults for KLpaging to include EIS,  exclude
       tracks  feature.   change KLpaging (new spec) to keep
       "logically  writable"  in   software   bit.    recode
       KLpaging  to  eliminate  problem  of writing hardware
       page  table  before  checking  for  age   trap,   and
       therefore leaving the page accessible after the trap.
       The recoding also improves the algorithm in that  the
       hardware  entry  includes  the  W bit set if the core
       tables allowed write and the CST  indicates  written,
       even if the current reference was not a write.
          Also fix code which writes page  table  directory,
       to  get  write reference bit from VMA HELD into bit 5
       of saved page fail word.

1.3    U is implicitly documented in  the  System  Reference
       Manual,  in  that it is an implimentation of a PDP10.
       The only other documentation is in  the  listing  and
       prints of the KL10 processor.

1.4    Function of U

       U is the microprogram which directs the operation  of
       the  KL10  hardware  to  emulate  the  behaviour of a
U.DOC -- Third release, edit 126                      Page 3


       PDP10.