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295 lines
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295 lines
10 KiB
Plaintext
Copyright (c) 1999 Massachusetts Institute of Technology
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See the COPYING file at the top-level directory of this project.
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------------------------------
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ITS INTERRUPTS:
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This file attempts to maintain up-to-date documentation on
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ITS interrupts. Those wonderful
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souls who update the information in any way (additions,
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deletions, corrections) should describe their
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modifications in a brief note to INFO-ITS@AI so
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that interested parties can correct their copies or
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conceptions without needing to print or read the
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entire file again. For example:
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:QMAIL INFO-ITS@AI I added more details to the %PIJST interrupt ^C
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If you want to be put on the INFO-ITS mailing list,
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just say so in a message to it.
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-------------------------------------------------
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<Most of ITS INTRUP is not here...>
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FIRST The Interrupt Bits in the First Interrupt Word.
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The interrupt classes are:
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[1] stops job and interrupts superior (fatal intr)
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[2] stops job and interrupts superior unless enabled and undeferred
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[3] does nothing unless enabled; waits if deferred.
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Bits in the left half have two names: %PI... as a bit in the word,
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and %PJ... shifted down by 18. bits.
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The following interrupts abort the instruction, and leave the PC pointing
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before the instruction if %OPOPC is 1 (as is winning), or after it if
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%OPOPC is 0: %PIMPV, %PIOOB, %PIIOC, %PIILO, %PITTY, %PIWRO, %PIFET, %PITRP.
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"(S)" indicates a synchronous interrupt; "(A)", an asynchronous one.
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An interrupt is synchronous if its occurrence is always directly related
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to the instruction that is being executed when it is signaled.
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SECOND The Interrupt Bits in the Second Interrupt Word.
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The right half of the second word (.IFPIR) is used for I/O channel
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interrupts that signal the arrival of or need for data.
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They should not be confused with I/O channel error interrupts
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or IOCERRors. Each channel has its own bit: 1.1 is for channel
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0; 1.2, for channel 1; ... 2.7, for channel 17 .
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They are all class 3, and their significance depends on the device
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open on the channel.
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The left half of the second word (.IFPIR) is used for
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"inferior got a fatal interrupt" interrupts. Each of a job's
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inferiors is assigned its own interrupt bit from among the
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bottom 8 bits of the left half. When an inferior job is created,
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its interrupt bit should be read and remembered by reading the
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.INTB variable with a .USET. Every time that inferior gets a fatal
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interrupt, it will be stopped and the superior will receive an
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interrupt on that inferior's bit in .IFPIR. The inferior may
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be restarted by zeroing its .USTP variable, but if the fatal
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interrupts remain and are still fatal the inferior will simply
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stop and interrupt the superior again. "Inferior got a fatal
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interrupt" interrupts are all class 3.
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The reason that inferiors interrupt through a special set of bits
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instead of using I/O channel interrupts is that it makes it possible
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to receive interrupts from all one's inferiors without having them
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all open on I/O channels at all times. DDT normally keeps only
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its current job open, and when it receives an interrupt from some
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other job it opens that job temporarily.
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STACK The format of the new-style interrupt stack
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-----------------------------------
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| 1st word interrupt bits |
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-----------------------------------
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| 2nd word interrupt bits |
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-----------------------------------
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| Saved .DF1 |
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-----------------------------------
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| Saved .DF2 |
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-----------------------------------
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| Saved program counter |
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-----------------------------------
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| . . . |
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| Saved accumulators, if any |
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| . . . |
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-----------------------------------
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| Saved .JPC, if requested |
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-----------------------------------
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| Saved .SUUOH, if requested |
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-----------------------------------
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Top -> | Saved LSPCL, if requested |
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-----------------------------------
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%PI1PR Single-instruction proceed [1] (S)
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If a job is started with the one-proceed flag
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(%PC1PR on KA-10's) set, after one instruction
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is completed a %PI1PR interrupt will occur.
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DDT's ^N command uses this feature.
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%PIARO Arithmetic overflow [3] (S)
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The PDP-10's built-in arithmetic overflow
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condition was detected by the hardware.
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In fact, overflow occurs so often
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that enabling this interrupt causes the
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machine to slow down considerably,
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and it should be avoided.
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%PIATY TTY returned. [3] (A)
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This interrupt happens when the TTY is
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returned by the superior, after having
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been taken away. TECO uses this to know
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that it must redisplay the entire screen.
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%PIB42 BADPI (Bad location 42) [1] (S)
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If in attempting to interrupt a job it turns out
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to be necessary to refer to nonexistent memory
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or write in read-only memory, this interrupt
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is signaled, instead of MPV or WIRO.
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This is so that the program will return to DDT
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instead of mysteriously looping.
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%PIBRK .BREAK instruction executed. [1] (S)
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.BREAK is used for DDT breakpoints, and for explicit
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program requests to DDT.
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%PIC.Z ^Z or CALL typed on terminal [1] (A)
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%PICLI CLI interrupt [3] (A)
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Some job opened the CLI device with filenames equal
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to the uname and jname of this job.
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%PICLK Slow (1/2 sec) clock [3] (A)
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%PIDBG System being debugged state change [3] (A)
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When the system enters or leaves "debugging mode",
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this interrupt is signaled.
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%PIDCL Deferred call. [1] (S)
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An attempt was made to read TTY input
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and the next character was a deferred-call
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character (^_D or Control-CALL).
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This deferred-call character is never seen
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by the program; it just causes the interrupt.
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It differs from ordinary CALL or ^Z
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in that it takes effect when the program
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gets around to reading it, not immediately.
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%PIDIS Display memory protect [2] (A)
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The 340 or E&S display got an MPV.
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This is now obsolete since the 340 and E&S
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no longer work.
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%PIDWN System-going-down status change [3] (A)
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If the system changes its mind about whether
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or when it is scheduled to go down, this interrupt
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is signaled.
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%PIFET Fetched insn from impure page [2] (S)
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On KA-10's, if bit %PCPUR of the PC flags is 1,
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fetching an instruction from an impure page
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will cause this interrupt. This is supposed to
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facilitate catching jumps to randomness.
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The guilty instruction is aborted, and the PC is
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left set according to %OPOPC.
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%PIFOV ARFOV (Floating overflow) [3] (S)
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This is a non-aborting PDP-10 hardware condition.
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%PIILO ILOPR, ILUUO (illegal operation) [2] (S)
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This can be caused by a returnable uuo when the
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program's 41 doesn't seem suitable for handling one
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(see ITS UUOS). It can also be used to report
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the failure of certain more archaic system calls.
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The guilty instruction was aborted, and the PC was
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left set according to %OPOPC.
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%PIIOC IOCERR (I/O channel error) [2] (S)
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This indicates the failure of an I/O system
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call. The channel that was being operated on is
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in .BCHN, and its .IOS word should contain, in
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bits 4.5 - 4.1, an error code.
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The guilty instruction was aborted, and the PC was
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left set according to %OPOPC.
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%PIJST Job Status display request. [3] (A)
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The sequence ^_J was typed on the
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console owned by this process or some inferior.
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%PILOS Lossage signaled. [2] (S)
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A .LOSE UUO or a LOSE system call was executed.
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%PILTP 340 or E&S light pen hit [3] (A)
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%PIMAR MAR hit. [2] (S)
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The MAR is a hardware feature that allows
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references to a specific memory location to
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be trapped. This is the interrupt that happens
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when such a reference is detected. The guilty
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instuction is usually not aborted; if it is, the
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PC is SOS'ed regardless of the setting of %OPOPC.
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See the .MARA and .MARPC variables.
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%PIMPV MPV (memory protect violation) [2] (S)
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The job referenced a non-existent memory location.
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The address of that location (roundd down to
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a page boundary on KA-10's) may be found in .MPVA.
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The guilty instruction was aborted, and the PC was
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left set according to %OPOPC.
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%PINXI Non-existent IO register [2] (S)
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A Job in User IOT mode referenced a non-existent IO
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register on the KS10 Unibus. The PC is left pointing
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before the guilty instruction. The address of the
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non-existant register may be found in .MPVA.
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%PIOOB Address out of bounds [2] (S)
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This is an obscure condition that used to
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happen on USR device IOT's, when an attempt
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was made to refer to a nonexistent location in the
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other job. Now this always causes an MPV.
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The guilty instruction was aborted, and the PC was
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left set according to %OPOPC.
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%PIPAR Memory parity error [2] (A)
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Programs are not intended to try to recover
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from parity errors, on the assumption that they
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are probably permanently screwed up.
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This interrupt is asynchronous because it can
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be caused by a parity error in another job
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which destroys data in a page shared with this job.
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%PIPDL PDL overflow [3] (S)
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%PIRLT Real-time timer went off [3] (A)
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These interrupts are controlled by the .REALT
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uuo. See ITS UUOS.
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%PIRUN Run-time timer went off [3] (A)
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This interrupt is requested (in advance)
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by setting .RTMR.
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%PITRP SYSUUO (System uuo in trap mode) [1] (S)
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A job whose .UTRAP variable was nonzero either
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attempted to execute an instruction that trapped
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to the system, or was about to be interrupted.
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This feature is intended to be used by the superior
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to provide a non-ITS environment for the inferior.
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The guilty instruction was aborted, and the PC was
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left set according to %OPOPC.
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%PITTY Don't have TTY [2] (S)
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This results from an attempt to use the job's
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console tty when the job does not own it, if
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%TBINT is 1 and %TBWAT is 0. See ITS TTY.
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The guilty instruction is aborted, and the PC is
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left set according to %OPOPC.
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%PITYI TTY input (obsolete) [3] (A)
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%PIVAL .VALUE instruction executed [1] (S)
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%PIWRO WIRO (Write in read-only page) [2] (S)
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The guilty instruction was aborted, and the PC was
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left set according to %OPOPC. The address of read
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only location (rounded down to a page boundary on
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KA-10's) may be found in .MPVA.
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