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598 lines
18 KiB
Plaintext
598 lines
18 KiB
Plaintext
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2500 - FUNCTIONAL SPECIFICATIONS
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WORD LENGTH - 16 BITS
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CYCLE TIME - 220 nanoseconds
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MEMORY SIZE - control memory, 1K expandable to 4K
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main memory, 4K expandable to 64K
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REGISTERS - 8 working registers
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- 32 scratch pad registers
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- 15 deep push down stack
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- 5 special registers
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GRAPHIC DISPLAY - size 11" x 11"
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- working area 8" x 8"
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- resolution 512 x 512
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- write speed 2,000,000 points/sec
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- phosphor high speed, white
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TEXT DISPLAY - size 15
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- lines 30
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- characters/line 72
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- fonts programmable
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- characters 8x16 dot matrix
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- phosphor green
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The TT2500 is a high speed bus-oriented minicomputer, designed for
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education. It is especially suited for systems involving animated
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graphics, real time device control, and emulation of "high level" order
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codes.
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The basic TT2500 system includes processor, memory, graphics display,
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text display, keyboard, communications interface, bootstrap loader, real
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time clock, cassette tape unit, power supply and cabinets.
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The TT2500 processor is a register oriented, parallel
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transfer computer using 16 bit, two's complement arithmetic. The cycle
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time of a typical instruction is 220 nanoseconds.
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The basic arithmetic and logical operations of the machine are
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performed on 8 high speed working registers. There are also 32 fast
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scratch pad registers and a number of special purpose registers.
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The TT2500 has two random access memories. Programs are stored in
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1024 words of 40 nanosecond static bipolar memory. This control memory
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may be expanded to 4096 words. Data is stored in a dynamic
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semiconductor main memory. The basic machine is supplied with 4096
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words of main memory, expandable to 65,536 words. Both the main memory
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and the control memory use 16 bit words, and data may be transferred
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freely between them.
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The 2500 is especially suited for use as a micro-programmed
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machine. In this mode the program in the control memory is an
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interpreter for a more complex order code. This higher level instruction
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set is referred to as Macro-code. Macro-code programs are stored in
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main memory. The 2500 has several features to make this interpretation
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efficient.
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INPUT/OUTPUT
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INPUT/OUTPUT on the 2500 is done in a particularly straightforward
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manner. Data may be transferred from any working register to any of 16
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output devices in a single 250 nanosecond instruction. Similarly data
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may be read from any of 16 input devices. All communication with the
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outside world is done through an I/O bus. It is quite simple to attach
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new physical devices to this bus.
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Animated pictures are displayed as points and vectors on an 11 inch
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screen. The resolution of this display is 512 x 512 points.
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The text display will display 30 lines of 72 characters each. The
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character fonts are defined by the user and may be changed under
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processor control.
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ORGANIZATION OF THE 2500
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ARITHMETIC LOGIC UNIT (ALU)
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The arithmetic logic Unit, or ALU is used to perform 16 different
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arithmetic, logical and shift operations. Operations are done on 16
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bits in parallel. Two's complement arithmetic is used. The ALU is
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capable of performing, logic, arithmetic or shift of up to 16 places in
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a single instruction cycle. The arithmetic logic unit generates signals
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that indicate carry, overflow, zero results and negative result. These
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signals may be used for conditional branching.
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BUS (24 lines)
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The BUS is the primary data path both internally and with the
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outside world. The BUS consists of 16 data lines, 6 device address
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lines, a READ line, and a WRITE line. Data may be transferred in either
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direction on the BUS via tri-state TTL signals. A device may read data
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from the BUS whenever its bus address is on the address lines and the
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READ line goes low. An addressed device may write while the WRITE line
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is low. When a device is not selected its outputs should be in the high
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impedance state. Devices transfer data to and from the BUS in less than
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50 nanoseconds.
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CONTROL MEMORY
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The control memory is a high speed random access bipolar memory in
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which the currently running program is stored. The access time of this
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memory is 40 nanoseconds. In applications where the computer is to be
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dedicated to a single usage this random access memory (RAM) can be
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replaced by a read only memory (ROM). The control memory may be
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expanded in 1K increments, up to 4K.
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CONTROL UNIT
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The control unit executes instruction from the control memory. In
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each 220 nanosecond cycle the control unit performs a data computation
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and an address calculation simulteneously. When the control unit
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receives an instruction it takes one cycle to decode it, calculate the
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address of the next instruction, and set up the data computation for the
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next cycle. At the same time it performs the data computation set up by
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the previous instruction. Because of this overlap the Control Unit
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executes an instruction once every 220 nanoseconds even though it may
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take 440 nanoseconds to complete a single instruction. This overlap is
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invisible to the user. The control unit is responsible for supervising
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the bus.
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MACRO REGISTER
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The MACRO REGISTER, or MR, is a special 16 bit register with
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features that make it useful in the interpretation of a macro order
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code. In this mode the macro command is stored in the MR after fetching
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it from main memory. The flow of the control program may then be
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determined by various bits in the macro command. MR is also a counter.
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This is useful in programming short fast loops such as multiply or
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divide routines.
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MEMORY ADDRESS REGISTER
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The Memory Address Register, or MAR, is a 16 bit register that
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holds the address of the main memory location currently being written
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into or read from.
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( The contents of this register cannot be read onto the bus. )
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MEMORY DATA REGISTER
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All data to and from the Main Memory is first loaded into the 16
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bit Memory Data Register, or MDR. In applications where a 16 bit main
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memory word is insufficient an extension register may be added to the
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MDR.
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MAIN MEMORY
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Main memory holds all data and Macro-code to be operated on. It is
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a random access dynamic semiconductor memory, made from 4K NMOS chips.
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The cycle time is 750 nanoseconds. The access time is 500 nanoseconds.
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The Main Memory is minimally 4096 words, and may be expanded to as large
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as 65,536 words. This memory will lose all data when power is turned
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off, unless a battery-powered memory-save device is attached.
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PROGRAM COUNTER
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The program counter, or PC, holds the control memory address of the
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next instruction. It is a 12 bit register which may be loaded from the
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stack or the control memory. It may also be incremented or added to
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from the BUS. During normal program flow the PC is incremented after
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each instruction. When a jump or branch instruction is encountered the
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jump address is loaded into it directly from the control memory. During
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a return from a subroutine call the PC is loaded from the top of the
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STACK. Certain special instructions such as SKIP and DISPATCH
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instruction may add BUS data to the current PC contents.
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SCRATCH PAD
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The Scratch Pad is composed of 32 16 bit registers designated S0
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through S31. It is used for temporary storage being much faster than
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main memory. Data may be read from or written into the Scratch Pad in a
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single cycle. Data cannot be operated on while in the scratch pad; it
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must first be moved into the working registers.
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STACK
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The 2500 is equipped with a hardware pushdown stack, 15 words deep.
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Each word is 12 bits wide. This stack is used for storing the return
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addresses of subroutines. Each time a subroutine call is executed the
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current contents of the PC is saved by pushing it onto the top of the
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stack. When returning from a subroutine the top of the stack is popped
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off into the PC. Because the stack is 15 deep the user may have
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subroutines nested up to 15 levels. Attempts to use more than 15 levels
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of subroutine will result in program errors.
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WORKING REGISTERS
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All arithmetic logical and shift operations are performed on data
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stored in the 8 working registers designated R0 through R7. Each of
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these 16 bit registers is loaded directly from the bus. Data from each
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of these registers may be switched into either input of the ALU. The
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working registers cannot write data onto the bus directly, but must pass
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through the ALU. When interpreting a macro order code R7 is normally
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used as the macro program counted, and R6 as the macro stack pointer.
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ARITHMETIC
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ADD
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SUBtract
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INCrement
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DECrement Immediate
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eXtended ADD if Carry
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eXtended SUBtract
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LOGIC
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AND
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Inclusive OR (IOR)
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eXclusive OR (XOR) Immediate
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Not OR (NOR) if Carry
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ANDNot (ANDN)
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SHIFTING
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Arithmetic Right Shift (ARS)
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Double Arithmetic Right Shift (DARS)
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Triple Arithmetic Right Shift (TARS) Immediate
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ROTate (ROT) if Carry
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Mask and ROTate (MROT)
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TRANSFER
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( Register
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( Scratch pad
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PUT into ( Main memory
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GET from ( Macro Register
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( Processor Statur Register
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( Memory Date Register
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LOaD constant into register (LOD)
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SET macro conditions
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WRITE Control Memory
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CONTROL
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( Always
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( if Carry
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( if oVerflow
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JUMP IF (relative: 11 bit signed offset) ( if Zero
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( if Negative
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( if Interrupt
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( if Macro register 7128
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JUMP (absolute, 12 bit address) ( if Flat
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PUSH onto stack and Jump
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POP from stack and Jump
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DISpatch on bus bits DISBUS
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DISpatch on interrupts DISINT
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DISpatch on Conditions DISND
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DISpatch on Flags DISFLG
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INPUT/OUTPUT
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COMmunication link
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INput CASsett
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KEYboard
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COMmunication link
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CASsett
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OUTput
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VECtor generator
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PEN
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TEXT display
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TRANSFER
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Input/Output
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Main memory
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PUT into Register
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GET from Scratch pad
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Processor status register
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Memory Date register
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Control
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How to do things
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Arithmetic - All arithmetic is done using the working registers and the
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ALU. Here are the basic arithmetic instructions:
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ADD ADD
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SUBtract SUB
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INCrement (add one) INC
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DECrement (subtract one) DEC
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eXtended ADD (A plus B plus carry) XADD
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eXtended SUBtract (A minus B minus CARRY) XSUB
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Each of these instructions comes in three different flavors: Normal,
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Immediate, and Conditional.
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The normal form of the addition instruction is -
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ADD 1 2
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This will cause the contents of working register 2 to be added to
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the contents of working register 1. The result is stored in register 1.
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Register 2 is not effected.
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The immediate form of the addition instruction look like this:
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ADDI 1 2 45
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This instruction with add the number 45 with the contents of
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working register 2 and put the result in working register 1. Again
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register 2 is left unchanged. Immediate instructions use an extra word
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of control memory for the 16 bit literal. They take two cycles to
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execute.
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The conditional form of an instruction is exactly the same as the
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normal form, except that nothing takes place unless the previous
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operation resulted in a carry. This form is not very useful except in
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writing fast multiplication routines. It looks like this:
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ADDC 1 2
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All arithmetic instructions have all three forms, so that the
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complete set looks like this:
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ADD ADDI ADDC
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SUB SUBI SUBC
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INC INCI INCC
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DEC DECI DECC
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XADD XADDI XADDC
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XSUB XSUBI XSUBC
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XADD 2 3
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adds the contents of register 2 plus the contents of register 3 plus the
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carry from the previous operation. This is the fastest way to do double
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precision arithmetic.
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XSUB does the right thing for double precision subtraction.
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Example:
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ADD 1 2 ; add low order bits
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XADD 3 4 ; add high order bits
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or
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SUB 1 2 ; double precision
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XSUB 3 4 ; is easy as pie
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LOGIC
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The basic logical instructions are:
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AND AND
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Inclusive OR IOR
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eXclusive OR XOR
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Not OR NOR
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AND Not (A and (Not B)) ANON
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Like the arithmetic functions each of these instructions comes in
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all three flavors, making the complete set:
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AND ANDI ANDC
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IOR IROI IORC
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XOR XORI XORC
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NOR NORI NORC
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ANON ANDNI ANDNC
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These instructions are used in the same manner as the arithmetic
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instruction.
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SHIFTING
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Arithmetic right shifts (right shifts with the sign bit propagated)
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of up to three places may be done in a single cycle. The instructions
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are:
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Arithmetic Right Shift ARS
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Double Arithmetic Right Shift DARS
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Triple Arithmetic Right Shift TARS
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The ROTate instruction allows data to be shifted around in a circle
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up to 16 places in a single cycle.
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ROT 1 5
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This rorates the contents of register 1 five places.
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You can also perform an AND after the rotate using the Mask RoTate
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(MROT) instruction.
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EXAMPLE:
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GETR 2 1 ; brings data from 1 to 2
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MROT 3 5 ; this causes the data (coming from 1) to be rotated
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; five places on its way into 2!
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and the previous contents of register 1.
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;and it also AND's the shifted data with 3 and leaves result in 3!
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Note that the shifted result, before ANDing, is left in register 2.
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All of the shift instructions come in normal, immediate and
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conditional form. Here is the complete list:
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ARS ARSI ARSC
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DARS DARSI DARSC
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TARS TARSI TARSC
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ROT ROTI ROTC
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MROT MROTI MROTC
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The MROTI instruction is useful.
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EXAMPLE:
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PUTR 2 1
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MROTI 2 5 177 ; the contents of register 1 rotated 5 places,
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ANDed with the number 177, and loaded into
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register 2.
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MOVING DATA AROUND
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Data in a working register is put other places using a PUT instruction.
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PUTR 1 2
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will put the contents of register 1 into register 2.
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PUTS 1 2
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will put the contents of register 1 into scratch pad location 2.
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PUTM 1 2
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will put it into the main memory location addressed by register 1.
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PUTPSR 1
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will put the contents of register 1 into the processor status register.
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PUTMDR 1
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will put it into the memory data register.
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PUTMR 1
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will put it into the macro register. To get things into a working
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register use one of the GET instructions.
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GETR 1 2
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loads register 1 with the contents of register 2
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GETS 1 2
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loads it from scratch pad 2.
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GETM 2
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loads from the memory addressed by 2 into the memory data register.
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GETMDR 1
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loads register one with the contents of the memory data register and
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GETPSR 1
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loads it from the processor status register.
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GETMR 1
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will load it from the macro register.
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The three more data transfer instructions
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SET conditions SET
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LOaD register LOD
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Write Control Memory WCM
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SET sets the least significant four bits of the processor status
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register to be the carry, overflow, zero condition and sign bit of the
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most recent result.
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LOD 1 2525
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will load the number 2525 in register 1.
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WCM 3
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will write the contents of register 3 into the control memory location
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addressed by the macro register.
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PUSHJ 425
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would be used to jump to a subroutine a location 425. Before it
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transfers control it saves the current pc on the top of the stack.
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POPJ
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returns from the subroutine by poping of the top of the stack and
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jumping there. Since the stack is 15 deep this allows nesting of
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subroutines up to 15 levels.
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