+ Added "1.2" features back into Motherboard.kicad_pcb in feature branch

+ Added sym-lib-table and fp-lib-table to fix symbol/footprint mapping issues

Board Files/Motherboard.lib

@@ -561,4 +561,97 @@ X D7 9 -500 150 100 R 50 50 1 1 B
 ENDDRAW
 ENDDEF
 #
+# Diode_Array_7pin_(Anode-Common)
+#
+DEF Diode_Array_7pin_(Anode-Common) U 0 40 Y Y 1 F N
+F0 "U" 0 0 50 H V C CNN
+F1 "Diode_Array_7pin_(Anode-Common)" 0 0 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 2 0 1 0 -350 -200 -350 -150 N
+P 2 0 1 0 -200 -200 -200 -150 N
+P 2 0 1 0 -150 -250 -150 -250 N
+P 2 0 1 0 -50 -200 -50 -150 N
+P 2 0 1 0 250 -200 250 -150 N
+P 2 0 1 0 400 -200 400 -150 N
+P 3 0 1 0 -350 -300 -300 -300 -400 -300 N
+P 3 0 1 0 -200 -300 -250 -300 -150 -300 N
+P 3 0 1 0 -50 -300 -100 -300 0 -300 N
+P 3 0 1 0 250 -300 200 -300 300 -300 N
+P 3 0 1 0 400 -300 350 -300 450 -300 N
+P 3 0 1 0 550 -300 500 -300 600 -300 N
+P 4 0 1 0 -350 -300 -300 -200 -400 -200 -350 -300 N
+P 4 0 1 0 -350 -200 -350 -150 550 -150 550 -200 N
+P 4 0 1 0 -200 -300 -150 -200 -250 -200 -200 -300 N
+P 5 0 1 0 -50 -200 -100 -200 -50 -300 0 -200 -50 -200 N
+P 5 0 1 0 250 -200 200 -200 250 -300 300 -200 250 -200 N
+P 5 0 1 0 400 -200 350 -200 400 -300 450 -200 400 -200 N
+P 5 0 1 0 550 -200 500 -200 550 -300 600 -200 550 -200 N
+X ~ 1 -350 -200 100 D 50 50 1 1 O
+X ~ 2 -200 -200 100 D 50 50 1 1 O
+X ~ 3 -50 -200 100 D 50 50 1 1 O
+X ~ 4 100 -150 100 U 50 50 1 1 I
+X ~ 5 250 -200 100 D 50 50 1 1 O
+X ~ 6 400 -200 100 D 50 50 1 1 O
+X ~ 7 550 -200 100 D 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# Diode_Array_7pin_(Cathode-Common)
+#
+DEF Diode_Array_7pin_(Cathode-Common) U 0 40 Y Y 1 F N
+F0 "U" 0 0 50 H V C CNN
+F1 "Diode_Array_7pin_(Cathode-Common)" 0 0 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 2 0 1 0 -350 -200 -350 -150 N
+P 2 0 1 0 -200 -200 -200 -150 N
+P 2 0 1 0 -150 -250 -150 -250 N
+P 2 0 1 0 -50 -200 -50 -150 N
+P 2 0 1 0 250 -200 250 -150 N
+P 2 0 1 0 400 -200 400 -150 N
+P 3 0 1 0 -350 -200 -400 -200 -300 -200 N
+P 3 0 1 0 -200 -200 -250 -200 -150 -200 N
+P 3 0 1 0 -50 -200 -100 -200 0 -200 N
+P 3 0 1 0 250 -200 200 -200 300 -200 N
+P 3 0 1 0 400 -200 350 -200 450 -200 N
+P 3 0 1 0 550 -200 500 -200 600 -200 N
+P 4 0 1 0 -350 -200 -350 -150 550 -150 550 -200 N
+P 4 0 1 0 -350 -200 -300 -300 -400 -300 -350 -200 N
+P 4 0 1 0 -200 -200 -250 -300 -150 -300 -200 -200 N
+P 4 0 1 0 250 -200 300 -300 200 -300 250 -200 N
+P 4 0 1 0 400 -200 450 -300 350 -300 400 -200 N
+P 4 0 1 0 550 -200 500 -300 600 -300 550 -200 N
+P 5 0 1 0 -50 -200 0 -300 -100 -300 -50 -200 -50 -250 N
+X ~ 1 -350 -200 100 D 50 50 1 1 O
+X ~ 2 -200 -200 100 D 50 50 1 1 O
+X ~ 3 -50 -200 100 D 50 50 1 1 O
+X ~ 4 100 -150 100 U 50 50 1 1 I
+X ~ 5 250 -200 100 D 50 50 1 1 O
+X ~ 6 400 -200 100 D 50 50 1 1 O
+X ~ 7 550 -200 100 D 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# Ferrite_Core
+#
+DEF Ferrite_Core FC 0 40 Y Y 1 F N
+F0 "FC" 0 0 50 H V C CNN
+F1 "Ferrite_Core" 0 0 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+A -275 -200 25 1 1799 0 1 0 N -250 -200 -300 -200
+A -225 -200 25 1 1799 0 1 0 N -200 -200 -250 -200
+A -175 -200 25 1 1799 0 1 0 N -150 -200 -200 -200
+A -125 -200 25 1 1799 0 1 0 N -100 -200 -150 -200
+P 2 0 1 0 -300 -200 -350 -200 N
+P 2 0 1 0 -100 -200 -50 -200 N
+X ~ ~ -350 -200 0 R 50 50 1 1 I
+X ~ ~ -50 -200 0 R 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
 #End Library

Board Files/Motherboard.pro

@@ -1,4 +1,4 @@
-update=12/2/2019 9:31:35 PM
+update=11/5/2021 4:25:38 PM
 version=1
 last_client=kicad
 [general]
@@ -12,16 +12,6 @@ NetIExt=net
 version=1
 LibDir=
 [eeschema/libraries]
-[schematic_editor]
-version=1
-PageLayoutDescrFile=
-PlotDirectoryName=F:/NES-RE/Board Files
-SubpartIdSeparator=0
-SubpartFirstId=65
-NetFmtName=
-SpiceAjustPassiveValues=0
-LabSize=50
-ERC_TestSimilarLabels=1
 [pcbnew]
 version=1
 PageLayoutDescrFile=
@@ -250,3 +240,13 @@ uViaDrill=0.1
 dPairWidth=0.2
 dPairGap=0.25
 dPairViaGap=0.25
+[schematic_editor]
+version=1
+PageLayoutDescrFile=
+PlotDirectoryName=C:/Users/Redherring32/Documents/OpenTendo.git/trunk/Schematics/
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceAjustPassiveValues=0
+LabSize=50
+ERC_TestSimilarLabels=1

Board Files/fp-lib-table

@@ -0,0 +1,3 @@
+(fp_lib_table
+  (lib (name NESRE)(type KiCad)(uri "C:/Users/Redherring32/Documents/OpenTendo.git/trunk/Component Footprints/NESRE.pretty")(options "")(descr ""))
+)

Board Files/sym-lib-table

@@ -0,0 +1,3 @@
+(sym_lib_table
+  (lib (name Motherboard)(type Legacy)(uri ${KIPRJMOD}/Motherboard.lib)(options "")(descr ""))
+)

Component Footprints/NESRE.pretty/EXP_Header.kicad_mod

@@ -1,56 +1,76 @@
-(module EXP_Header (layer F.Cu) (tedit 5D965D3D)
+(module EXP_Header (layer F.Cu) (tedit 60FDFAB4)
-  (fp_text reference P2-EXP1 (at -4.53 2.804) (layer F.SilkS)
+  (fp_text reference P2 (at -1 11) (layer F.SilkS)
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (fp_text value SOCKET-50V (at -2.819 -4.188) (layer F.Fab)
+  (fp_text value EXP-Connector (at -2.733 -3.875) (layer F.Fab)
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (pad 4 thru_hole circle (at 7.615 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_text user 1 (at -3 7) (layer F.SilkS)
-  (pad 5 thru_hole circle (at 10.155 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+    (effects (font (size 1 1) (thickness 0.15)))
-  (pad 6 thru_hole circle (at 12.7 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  )
-  (pad 1 thru_hole circle (at -0.008 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_text user 48 (at -3 0) (layer F.SilkS)
-  (pad 2 thru_hole circle (at 2.532 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+    (effects (font (size 1 1) (thickness 0.15)))
-  (pad 3 thru_hole circle (at 5.076 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  )
-  (pad 8 thru_hole circle (at 17.775 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_text user 24 (at 61 7) (layer F.SilkS)
-  (pad 9 thru_hole circle (at 20.318 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+    (effects (font (size 1 1) (thickness 0.15)))
-  (pad 14 thru_hole circle (at 33.016 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  )
-  (pad 13 thru_hole circle (at 30.476 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_text user 25 (at 61 0) (layer F.SilkS)
-  (pad 20 thru_hole circle (at 48.254 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+    (effects (font (size 1 1) (thickness 0.15)))
-  (pad 23 thru_hole circle (at 55.878 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  )
-  (pad 12 thru_hole circle (at 27.937 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_line (start 69.52 9.5) (end 69.52 -3) (layer F.SilkS) (width 0.12))
-  (pad 21 thru_hole circle (at 50.798 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_line (start -11.1 9.49) (end -11.1 -3.01) (layer F.SilkS) (width 0.12))
-  (pad 22 thru_hole circle (at 53.338 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_line (start -11.1 -3.01) (end 69.52 -3) (layer F.SilkS) (width 0.12))
-  (pad 17 thru_hole circle (at 40.64 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_line (start 69.52 9.5) (end -11.1 9.49) (layer F.SilkS) (width 0.12))
-  (pad 10 thru_hole circle (at 22.858 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_poly (pts (xy 69.52 -3) (xy 66.52 -3) (xy 69.52 0)) (layer F.SilkS) (width 0.1))
-  (pad 16 thru_hole circle (at 38.095 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (fp_poly (pts (xy -11.1 -3.01) (xy -11.1 -0.01) (xy -8.1 -3.01)) (layer F.SilkS) (width 0.1))
-  (pad 18 thru_hole circle (at 43.175 6.501) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 48 thru_hole circle (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 19 thru_hole circle (at 45.715 6.503) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 47 thru_hole circle (at 2.54 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 24 thru_hole circle (at 58.416 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 46 thru_hole circle (at 5.08 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 11 thru_hole circle (at 25.397 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 7 thru_hole circle (at 15.235 6.498) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 15 thru_hole circle (at 35.555 6.498) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 25 thru_hole circle (at 58.421 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 26 thru_hole circle (at 55.883 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 27 thru_hole circle (at 53.343 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 28 thru_hole circle (at 50.803 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 29 thru_hole circle (at 48.259 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 30 thru_hole circle (at 45.72 0.003) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 31 thru_hole circle (at 43.18 0.001) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 32 thru_hole circle (at 40.645 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 33 thru_hole circle (at 38.1 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 34 thru_hole circle (at 35.56 -0.002) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 35 thru_hole circle (at 33.021 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 36 thru_hole circle (at 30.481 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 37 thru_hole circle (at 27.942 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 38 thru_hole circle (at 25.402 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 39 thru_hole circle (at 22.863 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 40 thru_hole circle (at 20.323 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 41 thru_hole circle (at 17.78 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 42 thru_hole circle (at 15.24 -0.002) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 43 thru_hole circle (at 12.705 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 44 thru_hole circle (at 10.16 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
   (pad 45 thru_hole circle (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 46 thru_hole circle (at 5.081 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 44 thru_hole circle (at 10.16 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 47 thru_hole circle (at 2.537 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 43 thru_hole circle (at 12.7 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
-  (pad 48 thru_hole circle (at -0.003 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 42 thru_hole circle (at 15.24 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 41 thru_hole circle (at 17.78 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 40 thru_hole circle (at 20.32 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 39 thru_hole circle (at 22.86 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 38 thru_hole circle (at 25.4 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 37 thru_hole circle (at 27.94 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 36 thru_hole circle (at 30.48 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 35 thru_hole circle (at 33.02 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 34 thru_hole circle (at 35.56 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 33 thru_hole circle (at 38.1 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 32 thru_hole circle (at 40.64 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 31 thru_hole circle (at 43.18 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 30 thru_hole circle (at 45.72 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 29 thru_hole circle (at 48.26 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 28 thru_hole circle (at 50.8 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 27 thru_hole circle (at 53.34 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 26 thru_hole circle (at 55.88 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 25 thru_hole circle (at 58.42 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 1 thru_hole circle (at 0 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 2.54 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 3 thru_hole circle (at 5.08 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 4 thru_hole circle (at 7.62 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 5 thru_hole circle (at 10.16 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 6 thru_hole circle (at 12.7 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 7 thru_hole circle (at 15.24 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 8 thru_hole circle (at 17.78 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 9 thru_hole circle (at 20.32 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 10 thru_hole circle (at 22.86 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 11 thru_hole circle (at 25.4 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 12 thru_hole circle (at 27.94 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 13 thru_hole circle (at 30.48 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 14 thru_hole circle (at 33.02 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 15 thru_hole circle (at 35.56 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 16 thru_hole circle (at 38.1 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 17 thru_hole circle (at 40.64 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 18 thru_hole circle (at 43.18 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 19 thru_hole circle (at 45.72 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 20 thru_hole circle (at 48.26 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 21 thru_hole circle (at 50.8 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 22 thru_hole circle (at 53.34 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 23 thru_hole circle (at 55.88 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad 24 thru_hole circle (at 58.42 6.5) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask))
+  (pad "" thru_hole circle (at -3.5 3.25) (size 3.5 3.5) (drill 3.5) (layers *.Cu *.Mask))
+  (pad "" thru_hole circle (at 61.72 3.25) (size 2.5 2.5) (drill 2.5) (layers *.Cu *.Mask))
 )

Component Footprints/NESRE.pretty/Mod_RF.kicad_mod

@@ -1,17 +1,17 @@
-(module Mod_RF (layer F.Cu) (tedit 5DF56B32)
+(module Mod_RF (layer F.Cu) (tedit 5FF8DCCF)
-  (fp_text reference REF** (at 0 0.5) (layer F.SilkS)
+  (fp_text reference P3 (at 0.314 5.086) (layer F.SilkS)
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (fp_text value Mod_RF (at 0 -0.5) (layer F.Fab)
+  (fp_text value "MOD RF" (at 6.224 -1.314) (layer F.Fab)
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (pad 1 thru_hole circle (at 0 3) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 6 thru_hole oval (at 22.344 -2.275 90) (size 4.25 9.25) (drill oval 1.16 5.62) (layers *.Cu *.Mask))
-  (pad 2 thru_hole circle (at 4 3) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 6 thru_hole oval (at 22.344 16.575 90) (size 4.25 9.25) (drill oval 1.16 5.62) (layers *.Cu *.Mask))
-  (pad 3 thru_hole circle (at 8 3) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 6 thru_hole oval (at -6.23 15.9) (size 4.25 9.25) (drill oval 1.16 5.12) (layers *.Cu *.Mask))
-  (pad 4 thru_hole circle (at 12 3) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 6 thru_hole oval (at -6.23 5.1) (size 4.25 9.25) (drill oval 1.16 5.12) (layers *.Cu *.Mask))
-  (pad 5 thru_hole circle (at 16 3) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
+  (pad 5 thru_hole circle (at 16 2.156) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
-  (pad 6 thru_hole oval (at -5.2 6) (size 4.25 9.25) (drill oval 1.16 4.18) (layers *.Cu *.Mask))
+  (pad 4 thru_hole circle (at 12 2.156) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
-  (pad 7 thru_hole oval (at -5.25 16.75) (size 4.25 9.25) (drill oval 1.16 4.18) (layers *.Cu *.Mask))
+  (pad 3 thru_hole circle (at 8 2.156) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
-  (pad 8 thru_hole oval (at 24.134 16.575 90) (size 4.25 9.25) (drill oval 1.16 4.18) (layers *.Cu *.Mask))
+  (pad 2 thru_hole circle (at 4 2.156) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
-  (pad 9 thru_hole oval (at 24.134 -2.275 90) (size 4.25 9.25) (drill oval 1.16 4.18) (layers *.Cu *.Mask))
+  (pad 1 thru_hole circle (at 0 2.156) (size 3 3) (drill 1.5) (layers *.Cu *.Mask))
 )

Component Footprints/NESRE.pretty/NES_Edge_Connector.kicad_mod

@@ -1,80 +1,80 @@
-(module NES_Edge_Connector (layer F.Cu) (tedit 5D96B83E)
+(module NES_Edge_Connector (layer F.Cu) (tedit 5DAD00C1)
-  (fp_text reference P1-72EDGE1 (at 0 0.5) (layer F.SilkS)
+  (fp_text reference P1 (at 13.525 -0.025) (layer F.SilkS)
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (fp_text value CONN-NES-CARTRIDGE (at 0 -0.5) (layer F.Fab)
+  (fp_text value "72-Pin Connector" (at 13.725 -0.825) (layer F.Fab)
     (effects (font (size 1 1) (thickness 0.15)))
   )
-  (pad 37 smd rect (at 106.25 6.25) (size 3 9) (layers B.Cu B.Paste B.Mask))
-  (pad 28 smd rect (at 103.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 39 smd rect (at 100.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 40 smd rect (at 98.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 41 smd rect (at 95.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 52 smd rect (at 68.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 55 smd rect (at 60.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 68 smd rect (at 28.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 65 smd rect (at 35.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 61 smd rect (at 45.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 54 smd rect (at 63.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 60 smd rect (at 48.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 63 smd rect (at 40.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 59 smd rect (at 50.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 64 smd rect (at 38.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 66 smd rect (at 33.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 53 smd rect (at 65.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 62 smd rect (at 43.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 67 smd rect (at 30.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 57 smd rect (at 55.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 58 smd rect (at 53.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 56 smd rect (at 58.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 69 smd rect (at 25.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 70 smd rect (at 23.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 71 smd rect (at 20.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 72 smd rect (at 17.75 6.25) (size 3 9) (layers B.Cu B.Paste B.Mask))
-  (pad 47 smd rect (at 80.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 48 smd rect (at 78.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 50 smd rect (at 73.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 49 smd rect (at 75.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 51 smd rect (at 70.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 46 smd rect (at 83.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 42 smd rect (at 93.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 43 smd rect (at 90.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 44 smd rect (at 88.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 45 smd rect (at 85.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
-  (pad 36 smd rect (at 106.25 6.25) (size 3 9) (layers F.Cu F.Paste F.Mask))
-  (pad 35 smd rect (at 103.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 34 smd rect (at 100.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 33 smd rect (at 98.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 32 smd rect (at 95.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 31 smd rect (at 93.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 30 smd rect (at 90.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 29 smd rect (at 88.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 28 smd rect (at 85.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 27 smd rect (at 83.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 26 smd rect (at 80.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 25 smd rect (at 78.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 24 smd rect (at 75.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 23 smd rect (at 73.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 22 smd rect (at 70.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 21 smd rect (at 68.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 20 smd rect (at 65.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 19 smd rect (at 63.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 18 smd rect (at 60.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 17 smd rect (at 58.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 16 smd rect (at 55.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 15 smd rect (at 53.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 14 smd rect (at 50.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 13 smd rect (at 48.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 12 smd rect (at 45.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 11 smd rect (at 43.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 10 smd rect (at 40.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 9 smd rect (at 38.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 8 smd rect (at 35.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 7 smd rect (at 33.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 6 smd rect (at 30.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 5 smd rect (at 28.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 4 smd rect (at 25.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 3 smd rect (at 23.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
-  (pad 2 smd rect (at 20.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
   (pad 1 smd rect (at 17.75 6.25) (size 3 9) (layers F.Cu F.Paste F.Mask))
+  (pad 2 smd rect (at 20.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 3 smd rect (at 23.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 4 smd rect (at 25.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 5 smd rect (at 28.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 6 smd rect (at 30.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 7 smd rect (at 33.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 8 smd rect (at 35.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 9 smd rect (at 38.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 10 smd rect (at 40.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 11 smd rect (at 43.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 12 smd rect (at 45.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 13 smd rect (at 48.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 14 smd rect (at 50.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 15 smd rect (at 53.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 16 smd rect (at 55.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 17 smd rect (at 58.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 18 smd rect (at 60.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 19 smd rect (at 63.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 20 smd rect (at 65.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 21 smd rect (at 68.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 22 smd rect (at 70.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 23 smd rect (at 73.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 24 smd rect (at 75.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 25 smd rect (at 78.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 26 smd rect (at 80.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 27 smd rect (at 83.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 28 smd rect (at 85.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 29 smd rect (at 88.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 30 smd rect (at 90.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 31 smd rect (at 93.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 32 smd rect (at 95.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 33 smd rect (at 98.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 34 smd rect (at 100.75 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 35 smd rect (at 103.25 6.25) (size 2 9) (layers F.Cu F.Paste F.Mask))
+  (pad 36 smd rect (at 106.25 6.25) (size 3 9) (layers F.Cu F.Paste F.Mask))
+  (pad 64 smd rect (at 85.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 65 smd rect (at 88.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 66 smd rect (at 90.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 67 smd rect (at 93.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 63 smd rect (at 83.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 58 smd rect (at 70.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 60 smd rect (at 75.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 59 smd rect (at 73.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 61 smd rect (at 78.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 62 smd rect (at 80.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 37 smd rect (at 17.75 6.25) (size 3 9) (layers B.Cu B.Paste B.Mask))
+  (pad 38 smd rect (at 20.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 39 smd rect (at 23.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 40 smd rect (at 25.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 53 smd rect (at 58.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 51 smd rect (at 53.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 52 smd rect (at 55.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 42 smd rect (at 30.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 47 smd rect (at 43.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 56 smd rect (at 65.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 43 smd rect (at 33.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 45 smd rect (at 38.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 50 smd rect (at 50.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 46 smd rect (at 40.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 49 smd rect (at 48.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 55 smd rect (at 63.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 48 smd rect (at 45.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 44 smd rect (at 35.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 41 smd rect (at 28.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 54 smd rect (at 60.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 57 smd rect (at 68.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 68 smd rect (at 95.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 69 smd rect (at 98.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 70 smd rect (at 100.75 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 71 smd rect (at 103.25 6.25) (size 2 9) (layers B.Cu B.Paste B.Mask))
+  (pad 72 smd rect (at 106.25 6.25) (size 3 9) (layers B.Cu B.Paste B.Mask))
 )

README.md

@@ -1,61 +1,73 @@
 # Open 'Tendo
 An Open-Source HardWare (OSHW) recreation of the original 1985 Front-Loading NES motherboard.
 
-# Repository Structure:
 
-Board Files: Contains all files necessary to open the project in KiCad, as well as the schematic
+## Note on RGB and HDMI:
 
-Component Footprints: Contains a library of all the custom footprints used on the board
+Neither RGB nor HDMI video output were or are a goal of the OpenTendo project, the goal was/is documentation and preservation, and the project was an exercise in reverse engineering. As such "improved" video outputs will not be added to OpenTendo.
 
-Schematic Symbols: Contains all the custom schematic symbols made for this project
+NESRGB and Hi-Def NES can be installed as normal, but will not be incorporated into the OpenTendo PCB
+
+## Repository Structure:
+
+* Board Files: Contains all files necessary to open the project in KiCad, as well as the schematic and schematic symbols
+
+* Component Footprints: Contains a library of all the custom footprints used on the board
+
+* Schematics: Contains schematics for the OEM frontloading NES board revisions, some schematics represent more than one revision
 
 The files required to order PCBs can be found under releases.
 
-# Recommended PCB specs:
+## Recommended PCB specs:
 
-+2 layers
+* 2 layers
 
-+119mmx196mm
+* 119mmx196mm
 
-+1.6mm thickness
+* 1.6mm thickness
 
-+HASL surface finish
+* HASL or ENiG surface finish
 
-+And any color you want!
+* And any color you want!
 
-![Board Front](https://i.imgur.com/nQP6BoM.jpg)
+![Board Front](https://i.imgur.com/yBy1h27.jpeg)
 
 The design is as true to the original board as possible, with subtle changes where needed to compensate for outdated/unsourcable parts,
 as well as some improvements. (Expansion audio enabled, and other minor changes)
 
 Since this project is open-source you may do as you like with it, whether that is to make boards for personal use, sell replacement NES boards, or to use the provided info for further custom PCB work/designs.
 
-Note: At this point in time, any and all motherboards will require the use of an original CPU#, PPU##, and CIC Lockout chip### to function.
-These are the only three parts that are custom and have no available replacement, the rest can be replaced with modern, and or easily available parts.
-
-
 I am not in any way affiliated with Nintendo, I'm just doing this in my free time as a stepping stone into further Reverse Engineering work.
 
+*Note:* At this point in time, any and all motherboards will require the use of an original CPU[1],  and PPU[2] to function.
   
-#There is an aftermarket CPU, the part number is UA6527 (NTSC) or UA6527P (PAL), however they are known to have different sounding audio due to swapped duty cycles, as such they aren't a 100% identical substitute, they otherwise work though.
+These are the only two parts that are custom and have no available replacement, the rest can be replaced with modern, and or easily available parts.
 
-##There is an aftermarket PPU that can be used; the part number is UA6528 (NTSC) or UA6528P (PAL), and it is available on Aliexpress.
+
+The CIC lockout is also technically required, however you can either use an original part, or a [NullCIC replacement board](https://github.com/Redherring32/NullCIC).
+
+
+*[1]There is an aftermarket CPU, the part number is UA6527 (NTSC) or UA6527P (PAL), however they are known to have different sounding audio due to swapped duty cycles, as such they aren't a 100% identical substitute, they otherwise work though.
+
+*[2]There is an aftermarket PPU that can be used; the part number is UA6528 (NTSC) or UA6528P (PAL), and it is available on Aliexpress.
 While it works as a direct drop-in replacement, it isn't known whether it is compatible with all NES games.
 
-###The CIC Lockout can be removed, however the reset button will need to be wired differently, and will need to be pressed immediately after turning on the NES in order to initialize the cartridge
+
+## License:
+
+Licensed under
+the TAPR Open Hardware License (www.tapr.org/OHL)
+
+©Redherring32 2019-2020
 
 
-
+## Credits
-# Credits
+*=Lockster=* -Helping me tremendously along the way, keeping me from going insane, and cleaning up/helping with the final schematic. 
-=Lockster= -Helping me tremendously along the way, keeping me from going insane, and cleaning up/helping with the final schematic. 
 
 
-Krzysiobal -Putting together the NES-CPU-11 schematic that my schematic is largely built upon.
+*Krzysiobal* -Putting together the NES-CPU-11 schematic that my schematic is largely referrenced against.
 
 
 And to all of the awesome people in the NES scene, I wouldn't have been able to do this without the awesome work that some very clever people did before I got here. 
 
-Licensed under
-       the TAPR Open Hardware License (www.tapr.org/OHL)
 
-©Redherring32 2019-2020

Schematics/NES-CPU-11.sch

@@ -1,6 +1,5 @@
 EESchema Schematic File Version 4
-LIBS:Motherboard-cache
+EELAYER 30 0
-EELAYER 29 0
 EELAYER END
 $Descr A3 16535 11693
 encoding utf-8
@@ -15,7 +14,7 @@ Comment3 "Reverse Engineered by Krzysiobal"
 Comment4 "Nintendo Entertainment System (NES) Motherboard"
 $EndDescr
 $Comp
-L NES-CPU-11:RP2C02_PPU U5
+L Motherboard:RP2C02_PPU U5
 U 1 1 5D7FE1C0
 P 9900 6700
 F 0 "U5" H 9550 7800 50  0000 C CNN
@@ -278,7 +277,7 @@ Wire Wire Line
 Wire Wire Line
 	11000 7450 11450 7450
 $Comp
-L NES-CPU-11:2KB_SRAM U4
+L Motherboard:2KB_SRAM U4
 U 1 1 5D8358FE
 P 11850 7100
 F 0 "U4" H 11600 7800 50  0000 C CNN
@@ -325,7 +324,7 @@ Wire Wire Line
 Wire Wire Line
 	12250 6850 12700 6850
 $Comp
-L NES-CPU-11:74HC373 U2
+L Motherboard:74HC373 U2
 U 1 1 5D8739AE
 P 11850 5700
 F 0 "U2" H 11600 6300 50  0000 C CNN
@@ -465,7 +464,7 @@ F 3 "http://www.ti.com/lit/gpn/sn74LS04" H 9350 8350 50  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L NES-CPU-11:RP2A03_CPU U6
+L Motherboard:RP2A03_CPU U6
 U 1 1 5D911B13
 P 9550 2050
 F 0 "U6" H 9200 3150 50  0000 C CNN
@@ -723,7 +722,7 @@ Wire Wire Line
 Wire Wire Line
 	12550 2750 12150 2750
 $Comp
-L NES-CPU-11:2KB_SRAM U1
+L Motherboard:2KB_SRAM U1
 U 1 1 5DB49A97
 P 10600 3900
 F 0 "U1" H 10350 4600 50  0000 C CNN
@@ -832,7 +831,7 @@ Wire Wire Line
 Text Notes 9750 800  0    50   ~ 10
 CENTRAL PROCESSING UNIT & WORK RAM
 $Comp
-L NES-CPU-11:Controller_Port Controller_Port_1
+L Motherboard:Controller_Port Controller_Port_1
 U 1 1 5DCEA036
 P 1350 1650
 F 0 "Controller_Port_1" H 1350 2000 50  0000 C CNN
@@ -1008,7 +1007,7 @@ Connection ~ 2800 1950
 Wire Wire Line
 	2800 1950 2800 2200
 $Comp
-L NES-CPU-11:EXP-CON P2
+L Motherboard:EXP-CON P2
 U 1 1 5D833A72
 P 14250 6750
 F 0 "P2" H 14250 8100 59  0000 C CNN
@@ -1019,7 +1018,7 @@ F 3 "" H 14250 6750 50  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L NES-CPU-11:72-Pin_Connector P1
+L Motherboard:72-Pin_Connector P1
 U 1 1 5D838060
 P 14250 2850
 F 0 "P1" H 14250 4915 50  0000 C CNN
@@ -1514,7 +1513,7 @@ F 3 "~" H 3450 1450 50  0001 C CNN
 	-1   0    0    1   
 $EndComp
 $Comp
-L Schematic:Diode_Array_7pin_(Cathode-Common) DA1
+L Motherboard:Diode_Array_7pin_(Cathode-Common) DA1
 U 1 1 5E877EA3
 P 4150 750
 F 0 "DA1" H 3950 750 50  0000 R CNN
@@ -1529,7 +1528,7 @@ VCC
 Wire Wire Line
 	4250 650  4250 900 
 $Comp
-L Schematic:Diode_Array_7pin_(Anode-Common) DA2
+L Motherboard:Diode_Array_7pin_(Anode-Common) DA2
 U 1 1 5E8CEEDD
 P 4150 2150
 F 0 "DA2" H 3800 2050 50  0000 L CNN
@@ -1710,7 +1709,7 @@ Text Label 6300 1650 2    50   ~ 0
 Text Label 6300 1750 2    50   ~ 0
 GND
 $Comp
-L NES-CPU-11:Controller_Port Controller_Port_2
+L Motherboard:Controller_Port Controller_Port_2
 U 1 1 5F41BB80
 P 1350 3350
 F 0 "Controller_Port_2" H 1350 3700 50  0000 C CNN
@@ -1886,7 +1885,7 @@ F 3 "~" H 3450 3150 50  0001 C CNN
 	-1   0    0    1   
 $EndComp
 $Comp
-L Schematic:Diode_Array_7pin_(Cathode-Common) DA3
+L Motherboard:Diode_Array_7pin_(Cathode-Common) DA3
 U 1 1 5F41BBE4
 P 4150 2450
 F 0 "DA3" H 3950 2450 50  0000 R CNN
@@ -1901,7 +1900,7 @@ VCC
 Wire Wire Line
 	4250 2350 4250 2600
 $Comp
-L Schematic:Diode_Array_7pin_(Anode-Common) DA4
+L Motherboard:Diode_Array_7pin_(Anode-Common) DA4
 U 1 1 5F41BBEC
 P 4150 3850
 F 0 "DA4" H 3800 3750 50  0000 L CNN
@@ -2028,7 +2027,7 @@ F 3 "~" H 2550 3250 50  0001 C CNN
 	-1   0    0    1   
 $EndComp
 $Comp
-L NES-CPU-11:74HC368 U7
+L Motherboard:74HC368 U7
 U 1 1 5FA4F885
 P 7500 1350
 F 0 "U7" H 7250 1850 50  0000 C CNN
@@ -2100,7 +2099,7 @@ Wire Wire Line
 Wire Wire Line
 	7900 1700 8350 1700
 $Comp
-L NES-CPU-11:74HC368 U8
+L Motherboard:74HC368 U8
 U 1 1 5FF817ED
 P 7450 2500
 F 0 "U8" H 7200 3000 50  0000 C CNN
@@ -2242,17 +2241,6 @@ Text Label 8800 4100 1    50   ~ 0
 Wire Wire Line
 	8800 4100 8800 3800
 $Comp
-L Device:R R15
-U 1 1 60B446CF
-P 13150 6100
-F 0 "R15" V 13050 5900 50  0000 L CNN
-F 1 "100K" V 13050 6150 50  0000 L CNN
-F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 13080 6100 50  0001 C CNN
-F 3 "~" H 13150 6100 50  0001 C CNN
-	1    13150 6100
-	1    0    0    -1  
-$EndComp
-$Comp
 L Device:C_Variable TC1
 U 1 1 5D8E3F5E
 P 2600 7550
@@ -2403,7 +2391,7 @@ U 1 1 5E841A82
 P 1800 8550
 F 0 "C44" V 1650 8550 50  0000 C CNN
 F 1 "220pF" V 1550 8550 50  0000 C CNN
-F 2 "Capacitor_THT:C_Disc_D3.0mm_W2.0mm_P2.50mm" H 1800 8550 50  0001 C CNN
+F 2 "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 1800 8550 50  0001 C CNN
 F 3 "~" H 1800 8550 50  0001 C CNN
 	1    1800 8550
 	0    -1   -1   0   
@@ -2413,7 +2401,7 @@ L Device:R R13
 U 1 1 5EC660D3
 P 2200 8800
 F 0 "R13" V 2100 8650 50  0000 L CNN
-F 1 "1.2K" V 2100 8850 50  0000 L CNN
+F 1 "150K" V 2100 8850 50  0000 L CNN
 F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 2130 8800 50  0001 C CNN
 F 3 "~" H 2200 8800 50  0001 C CNN
 	1    2200 8800
@@ -2594,8 +2582,8 @@ $Comp
 L Device:C_Small C20
 U 1 1 6060ABA1
 P 3100 4950
-F 0 "C20" V 3200 5050 50  0000 C CNN
+F 0 "C20" V 3200 5100 50  0000 C CNN
-F 1 "51pF" V 3200 4850 50  0000 C CNN
+F 1 "220pF" V 3200 4750 50  0000 C CNN
 F 2 "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 3100 4950 50  0001 C CNN
 F 3 "~" H 3100 4950 50  0001 C CNN
 	1    3100 4950
@@ -2681,17 +2669,6 @@ Wire Wire Line
 Connection ~ 3500 4950
 Text Notes 2300 4650 2    50   ~ 10
 MONO AUDIO MIXER & AMPLIFER
-$Comp
-L Motherboard-rescue:Ferrite_Core-Schematic FC1
-U 1 1 5D8FC474
-P 3950 5100
-F 0 "FC1" H 3737 5125 50  0000 C CNN
-F 1 "39u" H 3737 5034 50  0000 C CNN
-F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" H 3950 5100 50  0001 C CNN
-F 3 "" H 3950 5100 50  0001 C CNN
-	1    3950 5100
-	1    0    0    -1  
-$EndComp
 Text Label 4200 5300 2    50   ~ 0
 AUDIO
 Text Label 4450 4750 2    50   ~ 0
@@ -2704,8 +2681,8 @@ L Device:C_Small C4
 U 1 1 5DD404CF
 P 3900 5400
 F 0 "C4" H 4100 5350 50  0000 C CNN
-F 1 "220pF" H 4100 5450 50  0000 C CNN
+F 1 "10nF" H 4100 5450 50  0000 C CNN
-F 2 "Capacitor_THT:C_Disc_D5.0mm_W2.5mm_P5.00mm" H 3900 5400 50  0001 C CNN
+F 2 "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 3900 5400 50  0001 C CNN
 F 3 "~" H 3900 5400 50  0001 C CNN
 	1    3900 5400
 	-1   0    0    1   
@@ -3017,8 +2994,8 @@ $Comp
 L Connector:Conn_01x05_Male P6
 U 1 1 60EC5AFE
 P 8200 7600
-F 0 "P6" H 8150 7500 50  0000 R CNN
+F 0 "P6" H 8150 7400 50  0000 R CNN
-F 1 "PWR/RST IN" H 8150 7600 50  0000 R CNN
+F 1 "PWR/RST IN" H 8150 7700 50  0000 R CNN
 F 2 "NESRE:PowerReset-switch-In" H 8200 7600 50  0001 C CNN
 F 3 "~" H 8200 7600 50  0001 C CNN
 	1    8200 7600
@@ -3029,14 +3006,14 @@ Wire Wire Line
 Wire Wire Line
 	8000 7700 7550 7700
 $Comp
-L Connector:Conn_01x09_Male P3
+L Connector:Conn_01x06_Male P3
 U 1 1 619A2E89
-P 8200 6800
+P 8200 7000
-F 0 "P3" H 8172 6732 50  0000 R CNN
+F 0 "P3" H 8172 6932 50  0000 R CNN
-F 1 "MOD RF" H 8172 6823 50  0000 R CNN
+F 1 "MOD RF" H 8172 7023 50  0000 R CNN
-F 2 "NESRE:Mod_RF" H 8200 6800 50  0001 C CNN
+F 2 "NESRE:Mod_RF" H 8200 7000 50  0001 C CNN
-F 3 "~" H 8200 6800 50  0001 C CNN
+F 3 "~" H 8200 7000 50  0001 C CNN
-	1    8200 6800
+	1    8200 7000
 	-1   0    0    1   
 $EndComp
 Text Label 7550 7200 0    50   ~ 0
@@ -3101,7 +3078,7 @@ U 1 1 5FDFF045
 P 5150 7100
 F 0 "C7" H 5000 7050 50  0000 C CNN
 F 1 "220pF" H 4950 7150 50  0000 C CNN
-F 2 "Capacitor_THT:C_Disc_D3.4mm_W2.1mm_P2.50mm" H 5150 7100 50  0001 C CNN
+F 2 "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 5150 7100 50  0001 C CNN
 F 3 "~" H 5150 7100 50  0001 C CNN
 	1    5150 7100
 	-1   0    0    1   
@@ -3112,7 +3089,7 @@ U 1 1 5FC5EB8E
 P 4850 7100
 F 0 "C6" H 5050 7050 50  0000 C CNN
 F 1 "220pF" H 5050 7150 50  0000 C CNN
-F 2 "Capacitor_THT:C_Disc_D3.4mm_W2.1mm_P2.50mm" H 4850 7100 50  0001 C CNN
+F 2 "Capacitor_THT:C_Disc_D3.0mm_W1.6mm_P2.50mm" H 4850 7100 50  0001 C CNN
 F 3 "~" H 4850 7100 50  0001 C CNN
 	1    4850 7100
 	-1   0    0    1   
@@ -3121,8 +3098,8 @@ $Comp
 L Device:R R1
 U 1 1 5F7756C9
 P 5150 6500
-F 0 "R1" V 5050 6350 50  0000 L CNN
+F 0 "R1" V 5250 6350 50  0000 L CNN
-F 1 "1M" V 5050 6550 50  0000 L CNN
+F 1 "1M" V 5250 6550 50  0000 L CNN
 F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" V 5080 6500 50  0001 C CNN
 F 3 "~" H 5150 6500 50  0001 C CNN
 	1    5150 6500
@@ -3315,7 +3292,7 @@ Wire Wire Line
 Wire Wire Line
 	8500 4900 8050 4900
 $Comp
-L NES-CPU-11:10NES_CIC U10
+L Motherboard:10NES_CIC U10
 U 1 1 5DB00CBC
 P 7600 5300
 F 0 "U10" H 7300 5850 50  0000 C CNN
@@ -3742,41 +3719,17 @@ Wire Wire Line
 	10750 6850 10350 6850
 Text Notes 3150 9100 0    50   ~ 10
 FILTER CAPACITORS
-Wire Wire Line
-	13150 5750 13150 5950
-Wire Wire Line
-	13150 5750 13950 5750
-Wire Wire Line
-	13150 6350 13950 6350
 Wire Wire Line
 	4850 6800 4850 7000
-$Comp
-L Device:Crystal_GND2 X2
-U 1 1 5DB9934D
-P 5000 6800
-F 0 "X2" H 5000 7068 50  0000 C CNN
-F 1 "4MHz" H 5000 6977 50  0000 C CNN
-F 2 "Crystal:Resonator_muRata_CSTLSxxxG-3Pin_W8.0mm_H3.0mm" H 5000 6800 50  0001 C CNN
-F 3 "~" H 5000 6800 50  0001 C CNN
-	1    5000 6800
-	1    0    0    -1  
-$EndComp
 Wire Wire Line
 	5150 6800 5250 6800
 Wire Wire Line
 	5000 7000 5000 7150
 Text Label 5000 7150 1    50   ~ 0
 GND
-Connection ~ 3900 5300
 Wire Wire Line
 	3900 5300 4200 5300
-Text Label 8000 6400 2    50   ~ 0
+Text Label 7550 6700 0    50   ~ 0
-GND
-Text Label 8000 6500 2    50   ~ 0
-GND
-Text Label 8000 6600 2    50   ~ 0
-GND
-Text Label 8000 6700 2    50   ~ 0
 GND
 Wire Wire Line
 	5500 2950 6300 2950
@@ -3875,5 +3828,30 @@ Connection ~ 3400 8250
 Wire Wire Line
 	3400 8250 3450 8250
 Wire Wire Line
-	13150 6250 13150 6350
+	8000 6700 7550 6700
+Wire Wire Line
+	13250 5750 13950 5750
+$Comp
+L Device:L_Core_Ferrite FC1
+U 1 1 6149D3C2
+P 3750 5300
+F 0 "FC1" V 3975 5300 50  0000 C CNN
+F 1 "39uH" V 3884 5300 50  0000 C CNN
+F 2 "Resistor_THT:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal" H 3750 5300 50  0001 C CNN
+F 3 "~" H 3750 5300 50  0001 C CNN
+	1    3750 5300
+	0    -1   -1   0   
+$EndComp
+Connection ~ 3900 5300
+$Comp
+L Device:Crystal_GND2 X2
+U 1 1 5DB9934D
+P 5000 6800
+F 0 "X2" H 5000 7068 50  0000 C CNN
+F 1 "4MHz" H 5000 6977 50  0000 C CNN
+F 2 "Crystal:Resonator_muRata_CSTLSxxxG-3Pin_W8.0mm_H3.0mm" H 5000 6800 50  0001 C CNN
+F 3 "~" H 5000 6800 50  0001 C CNN
+	1    5000 6800
+	1    0    0    -1  
+$EndComp
 $EndSCHEMATC

Schematics/sym-lib-table

@@ -0,0 +1,3 @@
+(sym_lib_table
+  (lib (name Motherboard)(type Legacy)(uri "C:/Users/Redherring32/Documents/OpenTendo.git/trunk/Board Files/Motherboard.lib")(options "")(descr ""))
+)