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interchange: add support for generating BEL clusters

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Clustering greatly helps the placer to identify and pack together
specific cells at the same site (e.g. LUT+FF), or cells that are chained through
dedicated interconnections (e.g. CARRY CHAINS)

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
This commit is contained in:
Alessandro Comodi
2021-06-02 09:49:30 +02:00
parent 7278d3c0ed
commit 104536b7aa
9 changed files with 713 additions and 24 deletions
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6
fpga_interchange/fpga_interchange.cpp
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@@ -539,10 +539,14 @@ void FpgaInterchange::write_physical_netlist(const Context * ctx, const std::str
auto net_iter = nets.begin();
for(auto & net_pair : ctx->nets) {
auto &net = *net_pair.second;
auto net_out = *net_iter++;
const CellInfo *driver_cell = net.driver.cell;
if (driver_cell == nullptr)
continue;
auto net_out = *net_iter++;
// Handle GND and VCC nets.
if(driver_cell->bel == ctx->get_gnd_bel()) {
IdString gnd_net_name(ctx->chip_info->constants->gnd_net_name);