diff --git a/himbaechel/uarch/gatemate/bitstream.cc b/himbaechel/uarch/gatemate/bitstream.cc index 72c4cd31..c788e7d2 100644 --- a/himbaechel/uarch/gatemate/bitstream.cc +++ b/himbaechel/uarch/gatemate/bitstream.cc @@ -250,6 +250,7 @@ struct BitstreamBackend case id_CPE_ADDCIN.index: case id_CPE_CI.index: case id_CPE_FF.index: + case id_CPE_LATCH.index: case id_CPE_RAMI.index: case id_CPE_RAMO.index: case id_CPE_RAMIO.index: { @@ -292,7 +293,7 @@ struct BitstreamBackend } } - if (cell.second->type.in(id_CPE_FF)) { + if (cell.second->type.in(id_CPE_FF, id_CPE_LATCH)) { update_cpe_inv(cell.second.get(), id_CLK, id_C_CPE_CLK, params); update_cpe_inv(cell.second.get(), id_EN, id_C_CPE_EN, params); bool set = int_or_default(params, id_C_EN_SR, 0) == 1; diff --git a/himbaechel/uarch/gatemate/constids.inc b/himbaechel/uarch/gatemate/constids.inc index 5f47bea3..66a7ac29 100644 --- a/himbaechel/uarch/gatemate/constids.inc +++ b/himbaechel/uarch/gatemate/constids.inc @@ -2237,3 +2237,4 @@ X(CPE_CONCAT) X(CPE_ADDCIN) X(CPE_CI) X(CPE_DUMMY) +X(CPE_LATCH) diff --git a/himbaechel/uarch/gatemate/gatemate.cc b/himbaechel/uarch/gatemate/gatemate.cc index 05201063..11934b03 100644 --- a/himbaechel/uarch/gatemate/gatemate.cc +++ b/himbaechel/uarch/gatemate/gatemate.cc @@ -340,7 +340,7 @@ IdString GateMateImpl::getBelBucketForCellType(IdString cell_type) const return id_GPIO; else if (cell_type.in(id_CPE_LT_U, id_CPE_LT_L, id_CPE_LT, id_CPE_L2T4, id_CPE_L2T5_L, id_CPE_L2T5_U, id_CPE_CI)) return id_CPE_LT; - else if (cell_type.in(id_CPE_FF_U, id_CPE_FF_L, id_CPE_FF)) + else if (cell_type.in(id_CPE_FF_U, id_CPE_FF_L, id_CPE_FF, id_CPE_LATCH)) return id_CPE_FF; else if (cell_type.in(id_CPE_RAMIO, id_CPE_RAMI, id_CPE_RAMO)) return id_CPE_RAMIO; @@ -371,9 +371,9 @@ bool GateMateImpl::isValidBelForCellType(IdString cell_type, BelId bel) const else if (bel_type == id_CPE_LT_L) return cell_type.in(id_CPE_LT_L, id_CPE_LT, id_CPE_L2T4, id_CPE_L2T5_L, id_CPE_CI, id_CPE_DUMMY); else if (bel_type == id_CPE_FF_U) - return cell_type.in(id_CPE_FF_U, id_CPE_FF); + return cell_type.in(id_CPE_FF_U, id_CPE_FF, id_CPE_LATCH); else if (bel_type == id_CPE_FF_L) - return cell_type.in(id_CPE_FF_L, id_CPE_FF); + return cell_type.in(id_CPE_FF_L, id_CPE_FF, id_CPE_LATCH); else if (bel_type.in(id_CPE_RAMIO_U, id_CPE_RAMIO_L)) return cell_type.in(id_CPE_RAMIO, id_CPE_RAMI, id_CPE_RAMO); else diff --git a/himbaechel/uarch/gatemate/pack_cpe.cc b/himbaechel/uarch/gatemate/pack_cpe.cc index ca440a54..3cc27195 100644 --- a/himbaechel/uarch/gatemate/pack_cpe.cc +++ b/himbaechel/uarch/gatemate/pack_cpe.cc @@ -192,7 +192,7 @@ void GateMatePacker::pack_cpe() dff->renamePort(id_D, id_DIN); dff->renamePort(id_Q, id_DOUT); dff_to_cpe(dff); - dff->type = id_CPE_FF; + dff->type = (dff->type == id_CC_DLT) ? id_CPE_LATCH : id_CPE_FF; } } } @@ -292,7 +292,7 @@ void GateMatePacker::pack_cpe() lt->params[id_INIT_L10] = Property(0b1010, 4); ci.movePortTo(id_D, lt, id_IN1); dff_to_cpe(&ci); - ci.type = id_CPE_FF; + ci.type = (ci.type == id_CC_DLT) ? id_CPE_LATCH : id_CPE_FF; NetInfo *conn = ctx->createNet(ctx->idf("%s$di", ci.name.c_str(ctx))); lt->connectPort(id_OUT, conn); ci.ports[id_DIN].name = id_DIN;