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Gowin. Implement on-chip oscillator.
A programmable on-chip crystal oscillator has been implemented for the GW5A series. A critical innovation in this series was the change in the nature of the OSC output pin—it now belongs to the clock wires, and therefore the routes must be made with a special global router, as there is no possibility of using routing through general-purpose PIPs. At the same time, we are transferring the outputs of all previous generations of OSC to potential clock wires. At the moment, this will not affect the way they are routed - they will still end up as segments as before, but in the future we may optimize the mechanism. Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
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@ -1022,6 +1022,7 @@ X(INV)
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// Oscillators
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X(OSC)
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X(OSCA)
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X(OSCZ)
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X(OSCH)
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X(OSCF)
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@ -1274,6 +1275,7 @@ X(ALU_COUT)
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X(PLL_O)
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X(PLL_I)
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// fake dff inputs
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X(XD0)
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X(XD1)
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@ -65,11 +65,11 @@ struct GowinGlobalRouter
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bool not_dcs_pip = dst_name != id_CLKOUT;
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IdString src_type = ctx->getWireType(src);
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IdString dst_type = ctx->getWireType(dst);
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bool src_valid = not_dcs_pip && src_type.in(id_GLOBAL_CLK, id_IO_O, id_PLL_O, id_HCLK, id_DLLDLY);
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bool src_valid = not_dcs_pip && src_type.in(id_GLOBAL_CLK, id_IO_O, id_PLL_O, id_HCLK, id_DLLDLY, id_OSCOUT);
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bool dst_valid = not_dcs_pip && dst_type.in(id_GLOBAL_CLK, id_TILE_CLK, id_PLL_I, id_IO_I, id_HCLK);
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bool res;
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if (src == src_wire && (!src_type.in(id_IO_O, id_HCLK, id_DLLDLY_O))) {
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if (src == src_wire && (!src_type.in(id_IO_O, id_HCLK, id_DLLDLY_O, id_OSCOUT))) {
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bool dst_is_spine = dst_name.str(ctx).rfind("SPINE", 0) == 0;
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res = src_valid && dst_is_spine;
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} else {
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@ -34,6 +34,19 @@ bool GowinUtils::driver_is_clksrc(const PortRef &driver)
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}
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}
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}
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// OSC outputs
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if (driver.cell->type.in(id_OSC, id_OSCA, id_OSCZ, id_OSCH, id_OSCF, id_OSCW, id_OSCO)) {
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if (driver.port == id_OSCOUT) {
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if (ctx->debug) {
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if (driver.cell->bel != BelId()) {
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log_info("OSC out bel:%s:%s\n", ctx->nameOfBel(driver.cell->bel), driver.port.c_str(ctx));
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} else {
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log_info("OSC out:%s:%s\n", ctx->nameOf(driver.cell), driver.port.c_str(ctx));
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}
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}
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return true;
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}
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}
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// PLL outputs
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if (driver.cell->type.in(id_rPLL, id_PLLVR)) {
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if (driver.port.in(id_CLKOUT, id_CLKOUTD, id_CLKOUTD3, id_CLKOUTP)) {
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