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Added the --ignore-rel-clk option to control timing checks for cross-domain paths, formatted code

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Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
This commit is contained in:
Maciej Kurc
2022-09-20 12:06:25 +02:00
parent 1f1bae3e23
commit 9000c41c4b
3 changed files with 105 additions and 112 deletions
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5
common/kernel/command.cc
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@@ -172,6 +172,7 @@ po::options_description CommandHandler::getGeneralOptions()
general.add_options()("no-pack", "process design without packing");
general.add_options()("ignore-loops", "ignore combinational loops in timing analysis");
general.add_options()("ignore-rel-clk", "ignore clock-to-clock relations in timing checks");
general.add_options()("version,V", "show version");
general.add_options()("test", "check architecture database integrity");
@@ -270,6 +271,10 @@ void CommandHandler::setupContext(Context *ctx)
ctx->settings[ctx->id("timing/ignoreLoops")] = true;
}
if (vm.count("ignore-rel-clk")) {
ctx->settings[ctx->id("timing/ignoreRelClk")] = true;
}
if (vm.count("timing-allow-fail")) {
ctx->settings[ctx->id("timing/allowFail")] = true;
}