From 9acc7946610fde9a35f2a3b77711b0262bb22f6a Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Thu, 25 Dec 2025 10:23:45 +0100 Subject: [PATCH] Test passtrough concept --- himbaechel/uarch/gatemate/extra_data.h | 1 + himbaechel/uarch/gatemate/gatemate.cc | 9 +++++++++ himbaechel/uarch/gatemate/gatemate.h | 1 + himbaechel/uarch/gatemate/gen/arch_gen.py | 3 +++ 4 files changed, 14 insertions(+) diff --git a/himbaechel/uarch/gatemate/extra_data.h b/himbaechel/uarch/gatemate/extra_data.h index 96e8cc5b..066171b2 100644 --- a/himbaechel/uarch/gatemate/extra_data.h +++ b/himbaechel/uarch/gatemate/extra_data.h @@ -85,6 +85,7 @@ enum MuxFlags MUX_VISIBLE = 2, MUX_CONFIG = 4, MUX_ROUTING = 8, + MUX_PASSTROUGH = 16, }; enum PipExtra diff --git a/himbaechel/uarch/gatemate/gatemate.cc b/himbaechel/uarch/gatemate/gatemate.cc index beb3548e..8ff8113f 100644 --- a/himbaechel/uarch/gatemate/gatemate.cc +++ b/himbaechel/uarch/gatemate/gatemate.cc @@ -308,6 +308,7 @@ void GateMateImpl::postPlace() repack(); ctx->assignArchInfo(); used_cpes.resize(ctx->getGridDimX() * ctx->getGridDimY()); + passtrough.resize(ctx->getGridDimX() * ctx->getGridDimY()); for (auto &cell : ctx->cells) { // We need to skip CPE_MULT since using CP outputs is mandatory // even if output is actually not connected @@ -317,11 +318,19 @@ void GateMateImpl::postPlace() marked_used = true; if (marked_used) used_cpes[cell.second.get()->bel.tile] = true; + int cy2_i = int_or_default(cell.second->params, id_C_CY2_I, 0); + if (cell.second.get()->type == id_CPE_MULT || cy2_i == 1) + passtrough[cell.second.get()->bel.tile] = true; } } bool GateMateImpl::checkPipAvail(PipId pip) const { const auto &extra_data = *pip_extra_data(pip); + if (extra_data.type == PipExtra::PIP_EXTRA_MUX && (extra_data.flags & MUX_PASSTROUGH)) { + //printf("pip: %s\n",ctx->getPipName(pip)[1].c_str(ctx)); + if (passtrough[pip.tile]) + return false; + } if (extra_data.type != PipExtra::PIP_EXTRA_MUX || (extra_data.flags & MUX_ROUTING) == 0) return true; if (used_cpes[pip.tile]) diff --git a/himbaechel/uarch/gatemate/gatemate.h b/himbaechel/uarch/gatemate/gatemate.h index 7298325a..0a59d6a4 100644 --- a/himbaechel/uarch/gatemate/gatemate.h +++ b/himbaechel/uarch/gatemate/gatemate.h @@ -97,6 +97,7 @@ struct GateMateImpl : HimbaechelAPI pool multiplier_zero_drivers; std::vector multipliers; std::vector used_cpes; + std::vector passtrough; int fpga_mode; int timing_mode; std::map global_signals; diff --git a/himbaechel/uarch/gatemate/gen/arch_gen.py b/himbaechel/uarch/gatemate/gen/arch_gen.py index 1e5b6a32..154f9530 100644 --- a/himbaechel/uarch/gatemate/gen/arch_gen.py +++ b/himbaechel/uarch/gatemate/gen/arch_gen.py @@ -31,6 +31,7 @@ MUX_INVERT = 1 MUX_VISIBLE = 2 MUX_CONFIG = 4 MUX_ROUTING = 8 +MUX_PASSTROUGH = 16 parser = argparse.ArgumentParser() parser.add_argument("--lib", help="Project Peppercorn python database script path", type=str, required=True) @@ -310,6 +311,8 @@ def main(): plane = int(mux.name[10:12]) if mux.name == "CPE.C_SN": mux_flags |= MUX_ROUTING + if mux.name == "PASS": + mux_flags |= MUX_PASSTROUGH pp.extra_data = PipExtraData(PIP_EXTRA_MUX, ch.strs.id(mux.name), mux.bits, mux.value, mux_flags, plane) if type_name in new_wires: for wire in sorted(new_wires[type_name]):