github.com/YosysHQ.nextpnr
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2 Commits

Author SHA1 Message Date
Miodrag Milanovic
0dc4bcb203 Format utlilisation for larger FPGA as well 2024-05-06 11:22:33 +02:00
gatecat
49f178ed94 Split up common into kernel,place,route 
Signed-off-by: gatecat <gatecat@ds0.me>
 2022-04-08 13:42:54 +01:00