David Shah 054be887ae ice40: PLLs can't conflict with themselves ...

Fixes error building testcase from #145

Signed-off-by: David Shah <dave@ds0.me>

2019-02-09 19:27:52 +00:00

..

benchmark

Improve ice40/benchmark

2018-07-30 13:57:14 +02:00

carry_tests

ice40: Fixing carry chain legaliser

2018-06-26 16:23:10 +02:00

pack_tests

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resource

refactor: Replace assert with NPNR_ASSERT

2018-07-04 12:15:23 +02:00

smoketest/attosoc

ci: Add attosoc smoketest for ice40

2018-12-08 17:09:27 +00:00

.gitignore

ice40: Importer for placed ice40 designs from arachne

2018-06-14 20:46:05 +02:00

arch_place.cc

ice40: Add helper to know which global network is driven by a SB_GB Bel

2018-11-26 12:51:14 +01:00

arch_pybindings.cc

timing: Add support for clock constraints

2018-11-12 14:03:58 +00:00

arch_pybindings.h

python: Fixes to get net wires map working

2018-11-22 13:42:20 +00:00

arch.cc

Merge pull request #220 from YosysHQ/coi3

2019-01-29 11:22:31 -08:00

arch.h

timing: Path related fixes

2019-01-27 16:45:37 +00:00

archdefs.h

ice40: Add timing data for all IO modes

2019-01-07 17:18:40 +00:00

bitstream.cc

ice40: Add PCF support for -pullup, -pullup_resistor and -nowarn

2018-12-20 20:52:54 +00:00

bitstream.h

Start adding bitstream reading for ice40

2018-07-20 13:27:21 +02:00

blinky_tb.v

Improve blinky testbench, double blink frequency

2018-06-30 08:00:51 +02:00

blinky.pcf

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blinky.proj

Made save project work as well

2018-07-21 12:15:50 +02:00

blinky.sh

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blinky.v

Improve blinky testbench, double blink frequency

2018-06-30 08:00:51 +02:00

blinky.ys

Cleanups in iCE40 blinky and picorv32 tests

2018-07-18 13:46:00 +02:00

cells.cc

clangformat

2018-12-06 10:52:46 +00:00

cells.h

ice40: Add support for placing SB_LEDDA_IP block.

2018-12-01 22:27:04 -03:00

chains.cc

ice40: Put debug logging behind ctx->debug

2018-12-06 10:51:17 +00:00

chains.h

Tidy up

2018-08-04 08:15:49 +02:00

chipdb.py

ice40/chipdb: Add wires to global network for all cells that can drive it

2018-11-19 18:20:20 +01:00

constids.inc

ice40/chipdb: Add wires to global network for all cells that can drive it

2018-11-19 18:20:20 +01:00

delay.cc

clangformat

2018-09-30 15:13:18 +01:00

family.cmake

Add iCE40 gfx for wires connecting fabric tiles and IO tiles

2018-08-18 17:17:01 +02:00

gfx.cc

clangformat

2018-11-16 13:25:51 +00:00

gfx.h

Add iCE40 gfx for IO span-4 corners

2018-08-19 16:53:34 +02:00

icebreaker.pcf

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icebreaker.v

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icebreaker.ys

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main.cc

ice40: Improve handling of unconstrained IO

2018-12-26 16:00:19 +00:00

pack.cc

ice40: PLLs can't conflict with themselves

2019-02-09 19:27:52 +00:00

pcf.cc

ice40: Improve handling of unconstrained IO

2018-12-26 16:00:19 +00:00

pcf.h

Use settings for json and pcf

2018-08-08 20:14:18 +02:00

picorv32_benchmark.py

timing_opt: Improve heuristics

2018-12-06 10:53:01 +00:00

picorv32_top.v

Add picorv32_top module with fewer IO pins

2018-06-13 17:38:34 +02:00

picorv32.proj

Fix warnings and status

2018-07-21 12:22:41 +02:00

picorv32.sh

Refactoring of router1

2018-07-21 17:02:53 +02:00

project.cc

Save settings and give nicer names to some

2018-08-10 19:11:30 +02:00

tmfuzz.py

Add new iCE40 delay estimator and delay predictor

2018-08-04 19:50:49 +02:00