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YosysHQ.nextpnr/nexus
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gatecat 685cc23b94 nexus: Fix global handling for LIFCL-17 
Signed-off-by: gatecat <gatecat@ds0.me>
2021-03-03 13:46:05 +00:00
..
.gitignore
nexus: Build and embed chipdb automatically
2020-11-30 08:45:27 +00:00
arch_place.cc
Remove isValidBelForCell
2021-02-16 13:31:36 +00:00
arch_pybindings.cc
nexus: Switch to BaseArch
2021-02-05 19:19:17 +00:00
arch_pybindings.h
nexus: Switch to BaseArch
2021-02-05 19:19:17 +00:00
arch.cc
Replace DelayInfo with DelayPair/DelayQuad
2021-02-19 11:31:33 +00:00
arch.h
nexus: Fix global handling for LIFCL-17
2021-03-03 13:46:05 +00:00
archdefs.h
Replace DelayInfo with DelayPair/DelayQuad
2021-02-19 11:31:33 +00:00
bba_version.inc
nexus: Switch from RelPtr to RelSlice
2021-01-27 17:24:01 +00:00
CMakeLists.txt
nexus: Update for new monolithic prjoxide
2020-11-30 08:45:27 +00:00
constids.inc
nexus: Add MULTADDSUB9X9WIDE support
2020-12-08 15:49:48 +00:00
family.cmake
nexus: Build and embed chipdb automatically
2020-11-30 08:45:27 +00:00
fasm.cc
Mark IdString and IdStringList single argument constructors explicit.
2021-02-04 16:38:07 -08:00
global.cc
Start making use of getBelPinsForCellPin API
2021-02-10 14:18:12 +00:00
io.cc
nexus: Basic support for differential IO types
2020-11-30 08:45:28 +00:00
main.cc
nexus: Add post-place LUTFF optimisation
2020-11-30 08:45:28 +00:00
pack.cc
Replace DelayInfo with DelayPair/DelayQuad
2021-02-19 11:31:33 +00:00
pdc.cc
nexus/pdc: Parse simple clock constraints
2020-12-02 09:34:11 +00:00
pins.cc
nexus: Fix LRAM pin types
2020-12-07 13:26:45 +00:00
post_place.cc
nexus: Add post-place LUTFF optimisation
2020-11-30 08:45:28 +00:00