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bc7b8b63ed6c8e855ca0256a2fde2b8c5885fd79
YosysHQ.nextpnr/mistral
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gatecat bc7b8b63ed mistral: Add a basic global clock router 
Signed-off-by: gatecat <gatecat@ds0.me>
2023-05-16 18:17:06 +02:00
..
arch_pybindings.cc
Fixing old emails and names in copyrights
2021-06-12 13:22:38 +01:00
arch_pybindings.h
Fixing old emails and names in copyrights
2021-06-12 13:22:38 +01:00
arch.cc
mistral: Add a basic global clock router
2023-05-16 18:17:06 +02:00
arch.h
mistral: Add a basic global clock router
2023-05-16 18:17:06 +02:00
archdefs.cc
mistral: Add some packing logic based on nexus
2021-05-15 14:54:33 +01:00
archdefs.h
mistral: Adding support for MLABs as memory
2021-10-05 12:40:47 +01:00
bitstream.cc
mistral: Updated CLK mux select name
2022-03-18 18:54:40 +00:00
constids.inc
mistral: M10K initialisation support
2022-03-12 17:08:20 +00:00
delay.cc
mistral: fixes and debug info
2022-03-09 17:13:54 +00:00
family.cmake
mistral: Add 'tools' dir to include path
2021-12-11 19:07:30 +00:00
globals.cc
mistral: Add a basic global clock router
2023-05-16 18:17:06 +02:00
io.cc
refactor: id(stringf(...)) to new idf(...) helper
2022-08-10 10:57:46 +01:00
lab.cc
refactor: id(stringf(...)) to new idf(...) helper
2022-08-10 10:57:46 +01:00
m10k.cc
refactor: id(stringf(...)) to new idf(...) helper
2022-08-10 10:57:46 +01:00
main.cc
refactor: Use constids instead of id("..")
2022-02-16 17:09:54 +00:00
pack.cc
refactor: id(stringf(...)) to new idf(...) helper
2022-08-10 10:57:46 +01:00
pins.cc
mistral: Adding support for MLABs as memory
2021-10-05 12:40:47 +01:00
qsf.cc
Using hashlib in arches
2021-06-02 15:05:19 +01:00