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mirror of https://github.com/YosysHQ/nextpnr.git synced 2026-01-11 23:53:21 +00:00
gatecat 59874188a6 generic: Refactor for faster performance
This won't affect Python-built arches significantly; but will be useful
for the future 'viaduct' functionality where generic routing graphs can
be built on the C++ side; too.

Signed-off-by: gatecat <gatecat@ds0.me>
2021-12-30 11:54:08 +00:00
..

Generic Architecture Example

This contains a simple, artificial, example of the nextpnr generic API.

  • simple.py procedurally generates a simple FPGA architecture with IO at the edges, logic slices in all other tiles, and interconnect only between adjacent tiles

  • simple_timing.py annotates cells with timing data (this is a separate script that must be run after packing)

  • write_fasm.py uses the nextpnr Python API to write a FASM file for a design

  • bitstream.py uses write_fasm.py to create a FASM ("FPGA assembly") file for the place-and-routed design

  • Run simple.sh to build an example design on the FPGA above