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YosysHQ.nextpnr/himbaechel
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YRabbit c9b23a01db gowin: Himbaechel. Add ALU. 
- Added support for ALU running in "2" ADDSUB mode, the mode that yosys generates for gowin;
- Supports specifying an arbitrary input carry as well as passing the output carry to logic;
- A small restructuring of the source files.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
2023-08-31 08:28:09 +02:00
..
himbaechel_dbgen
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
uarch
gowin: Himbaechel. Add ALU.
2023-08-31 08:28:09 +02:00
.gitignore
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
arch_pybindings.cc
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
arch_pybindings.h
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
arch.cc
clangformat
2023-05-19 09:00:31 +02:00
arch.h
Rip out budgets
2023-06-20 10:57:10 +02:00
archdefs.h
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
chipdb.h
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
family.cmake
wip start
2023-08-31 08:28:09 +02:00
himbaechel_api.cc
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
himbaechel_api.h
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
himbaechel_constids.h
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
himbaechel_helpers.cc
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
himbaechel_helpers.h
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00
main.cc
himbächel: Initial implementation
2023-05-13 08:26:41 +02:00