github.com/YosysHQ.yosys
1
0
Fork 0
mirror of synced 2026-05-04 07:10:19 +00:00
Code Issues Releases Wiki Activity

solves #675

Browse Source
This commit is contained in:
rafaeltp
2018-10-20 17:50:21 -07:00
parent f25d0de6f8
commit 0ad4321781
2 changed files with 21 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
kernel/rtlil.h
View File

@@ -1304,6 +1304,10 @@ inline const RTLIL::SigBit &RTLIL::SigSpecConstIterator::operator*() const {
}
inline RTLIL::SigBit::SigBit(const RTLIL::SigSpec &sig) {
if(sig.size() != 1 || sig.chunks().size() != 1) {
std::cout << "rtp " << sig.size() << std::endl;
std::cout << "rtp " << sig.chunks().size() << std::endl;
}
log_assert(sig.size() == 1 && sig.chunks().size() == 1);
*this = SigBit(sig.chunks().front());
}