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Refactoring: Renamed RTLIL::Design::modules to modules_

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Clifford Wolf
2014-07-27 10:18:00 +02:00
parent d088854b47
commit 10e5791c5e
73 changed files with 223 additions and 223 deletions
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passes/techmap/dfflibmap.cc
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@@ -524,7 +524,7 @@ struct DfflibmapPass : public Pass {
log(" final dff cell mappings:\n");
logmap_all();
for (auto &it : design->modules)
for (auto &it : design->modules_)
if (design->selected(it.second) && !it.second->get_bool_attribute("\\blackbox"))
dfflibmap(design, it.second);