diff --git a/.github/workflows/test-compile.yml b/.github/workflows/test-compile.yml index 9c75784bf..99e4973a7 100644 --- a/.github/workflows/test-compile.yml +++ b/.github/workflows/test-compile.yml @@ -44,18 +44,18 @@ jobs: - ubuntu-latest compiler: # oldest supported - - 'clang-10' - - 'gcc-10' + - 'clang-14' + - 'gcc-11' # newest, make sure to update maximum standard step to match - - 'clang-19' - - 'gcc-14' + - 'clang-22' + - 'gcc-15' include: # macOS x86 - os: macos-15-intel - compiler: 'clang-19' + compiler: 'clang-22' # macOS arm - os: macos-latest - compiler: 'clang-19' + compiler: 'clang-22' fail-fast: false steps: - name: Checkout Yosys @@ -74,6 +74,7 @@ jobs: uses: aminya/setup-cpp@v1 with: compiler: ${{ matrix.compiler }} + gcc: ${{ (matrix.os == 'ubuntu-latest' && matrix.compiler == 'clang-14') && '12' || '' }} - name: Tool versions shell: bash @@ -81,21 +82,26 @@ jobs: $CC --version $CXX --version - # minimum standard - - name: Build C++17 - shell: bash + - name: Fix clang-14 toolchain + if: matrix.os == 'ubuntu-latest' && matrix.compiler == 'clang-14' run: | - make config-$CC_SHORT - make -j$procs CXXSTD=c++17 compile-only + echo 'CXXFLAGS=--gcc-toolchain=/usr -isystem /usr/include/c++/12 -isystem /usr/include/x86_64-linux-gnu/c++/12' >> $GITHUB_ENV - # maximum standard, only on newest compilers + # minimum standard - name: Build C++20 - if: ${{ matrix.compiler == 'clang-19' || matrix.compiler == 'gcc-14' }} shell: bash run: | make config-$CC_SHORT make -j$procs CXXSTD=c++20 compile-only + # maximum standard, only on newest compilers + - name: Build C++26 + if: ${{ matrix.compiler == 'clang-22' || matrix.compiler == 'gcc-15' }} + shell: bash + run: | + make config-$CC_SHORT + make -j$procs CXXSTD=c++26 compile-only + test-compile-result: runs-on: ubuntu-latest needs: diff --git a/Makefile b/Makefile index 3c5c10cda..afbc11005 100644 --- a/Makefile +++ b/Makefile @@ -103,7 +103,7 @@ VPATH := $(YOSYS_SRC) # Unit test UNITESTPATH := $(YOSYS_SRC)/tests/unit -export CXXSTD ?= c++17 +export CXXSTD ?= c++20 CXXFLAGS := $(CXXFLAGS) -Wall -Wextra -Werror=unused -ggdb -I. -I"$(YOSYS_SRC)" -MD -MP -D_YOSYS_ -fPIC -I$(PREFIX)/include LIBS := $(LIBS) -lstdc++ -lm PLUGIN_LINKFLAGS := @@ -1142,7 +1142,7 @@ vcxsrc: $(GENFILES) $(EXTRA_TARGETS) kernel/version_$(GIT_REV).cc rm -rf $(VCX_DIR_NAME){,.zip} cp -f kernel/version_$(GIT_REV).cc kernel/version.cc set -e; for f in `ls $(filter %.cc %.cpp,$(GENFILES)) $(addsuffix .cc,$(basename $(OBJS))) $(addsuffix .cpp,$(basename $(OBJS))) 2> /dev/null`; do \ - echo "Analyse: $$f" >&2; cpp -std=c++17 -MM -I. -D_YOSYS_ $$f; done | sed 's,.*:,,; s,//*,/,g; s,/[^/]*/\.\./,/,g; y, \\,\n\n,;' | grep '^[^/]' | sort -u | grep -v kernel/version_ > srcfiles.txt + echo "Analyse: $$f" >&2; cpp -std=c++20 -MM -I. -D_YOSYS_ $$f; done | sed 's,.*:,,; s,//*,/,g; s,/[^/]*/\.\./,/,g; y, \\,\n\n,;' | grep '^[^/]' | sort -u | grep -v kernel/version_ > srcfiles.txt echo "libs/fst/fst_win_unistd.h" >> srcfiles.txt echo "kernel/version.cc" >> srcfiles.txt bash misc/create_vcxsrc.sh $(VCX_DIR_NAME) $(YOSYS_VER) diff --git a/docs/source/getting_started/installation.rst b/docs/source/getting_started/installation.rst index 43b996353..2a90a8071 100644 --- a/docs/source/getting_started/installation.rst +++ b/docs/source/getting_started/installation.rst @@ -87,7 +87,7 @@ not regularly tested: Build prerequisites ^^^^^^^^^^^^^^^^^^^ -A C++ compiler with C++17 support is required as well as some standard tools +A C++ compiler with C++20 support is required as well as some standard tools such as GNU Flex, GNU Bison (>=3.8), Make, and Python (>=3.11). Some additional tools: readline, libffi, Tcl and zlib; are optional but enabled by default (see :makevar:`ENABLE_*` settings in Makefile). Graphviz and Xdot are used by the diff --git a/docs/source/yosys_internals/extending_yosys/contributing.rst b/docs/source/yosys_internals/extending_yosys/contributing.rst index 1ff77a1fd..8d90d2cbe 100644 --- a/docs/source/yosys_internals/extending_yosys/contributing.rst +++ b/docs/source/yosys_internals/extending_yosys/contributing.rst @@ -286,7 +286,7 @@ have incorrect results in unusual situations. Coding style ~~~~~~~~~~~~ -Yosys is written in C++17. +Yosys is written in C++20. In general Yosys uses ``int`` instead of ``size_t``. To avoid compiler warnings for implicit type casts, always use ``GetSize(foobar)`` instead of diff --git a/docs/source/yosys_internals/index.rst b/docs/source/yosys_internals/index.rst index 483cc2bf8..217b88e36 100644 --- a/docs/source/yosys_internals/index.rst +++ b/docs/source/yosys_internals/index.rst @@ -25,7 +25,7 @@ wide range of real-world designs, including the `OpenRISC 1200 CPU`_, the .. _k68 CPU: http://opencores.org/projects/k68 -Yosys is written in C++, targeting C++17 at minimum. This chapter describes some +Yosys is written in C++, targeting C++20 at minimum. This chapter describes some of the fundamental Yosys data structures. For the sake of simplicity the C++ type names used in the Yosys implementation are used in this chapter, even though the chapter only explains the conceptual idea behind it and can be used diff --git a/kernel/fmt.cc b/kernel/fmt.cc index 200e7e5ce..15179a75a 100644 --- a/kernel/fmt.cc +++ b/kernel/fmt.cc @@ -804,8 +804,10 @@ std::string Fmt::render() const buf += 'X'; else if (has_z) buf += 'Z'; - else - buf += (part.hex_upper ? "0123456789ABCDEF" : "0123456789abcdef")[subvalue.as_int()]; + else { + const char *digits = part.hex_upper ? "0123456789ABCDEF" : "0123456789abcdef"; + buf += digits[subvalue.as_int()]; + } } } else if (part.base == 10) { if (part.show_base) diff --git a/kernel/io.h b/kernel/io.h index 1585987b8..e15194e79 100644 --- a/kernel/io.h +++ b/kernel/io.h @@ -475,7 +475,8 @@ public: private: std::string_view fmt; bool has_escapes = false; - FoundFormatSpec specs[sizeof...(Args)] = {}; + // Making array at least size of one to make MSVC happy and strict to standards + FoundFormatSpec specs[sizeof...(Args) ? sizeof...(Args) : 1] = {}; }; template struct WrapType { using type = T; }; diff --git a/kernel/yosys_common.h b/kernel/yosys_common.h index 47dae5473..062036dba 100644 --- a/kernel/yosys_common.h +++ b/kernel/yosys_common.h @@ -120,10 +120,10 @@ # define YS_MAYBE_UNUSED #endif -#if __cplusplus >= 201703L +#if __cplusplus >= 202002L # define YS_FALLTHROUGH [[fallthrough]]; #else -# error "C++17 or later compatible compiler is required" +# error "C++20 or later compatible compiler is required" #endif #if defined(__has_cpp_attribute) && __has_cpp_attribute(gnu::cold) diff --git a/misc/create_vcxsrc.sh b/misc/create_vcxsrc.sh index 98c1817bd..dccc31fac 100644 --- a/misc/create_vcxsrc.sh +++ b/misc/create_vcxsrc.sh @@ -25,6 +25,7 @@ if [ -f "/usr/include/FlexLexer.h" ] ; then cp /usr/include/FlexLexer.h libs/flex/FlexLexer.h ls libs/flex/*.h >> ../../srcfiles.txt fi +sed -i '\#libs/../kernel/yosys.h#d' ../../srcfiles.txt popd { @@ -35,7 +36,7 @@ popd tail -n +$((n+1)) "$vcxsrc"/YosysVS/YosysVS.vcxproj } > "$vcxsrc"/YosysVS/YosysVS.vcxproj.new -sed -i 's,,\n stdcpp17\n /Zc:__cplusplus %(AdditionalOptions),g' "$vcxsrc"/YosysVS/YosysVS.vcxproj.new +sed -i 's,,\n stdcpp20\n /Zc:__cplusplus %(AdditionalOptions),g' "$vcxsrc"/YosysVS/YosysVS.vcxproj.new sed -i 's,,YOSYS_ENABLE_THREADS;,g' "$vcxsrc"/YosysVS/YosysVS.vcxproj.new if [ -f "/usr/include/FlexLexer.h" ] ; then sed -i 's,,;..\\yosys\\libs\\flex,g' "$vcxsrc"/YosysVS/YosysVS.vcxproj.new diff --git a/passes/cmds/timeest.cc b/passes/cmds/timeest.cc index 3105affa1..579a9c48e 100644 --- a/passes/cmds/timeest.cc +++ b/passes/cmds/timeest.cc @@ -100,7 +100,7 @@ struct EstimateSta { cell, cell->type.unescape()); continue; } - if (ff.sig_clk != clk) + if (!clk || ff.sig_clk.as_bit() != *clk) continue; launch.append(ff.sig_q); sample.append(ff.sig_d); @@ -144,12 +144,12 @@ struct EstimateSta { log_error("Unsupported async memory port '%s'\n", rd.cell); continue; } - if (sigmap(rd.clk) != clk) + if (!clk || sigmap(rd.clk).as_bit() != *clk) continue; add_seq(rd.cell, rd.data, {rd.addr, rd.srst, rd.en}); } for (auto &wr : mem.wr_ports) { - if (sigmap(wr.clk) != clk) + if (!clk || sigmap(wr.clk).as_bit() != *clk) continue; add_seq(wr.cell, {}, {wr.en, wr.addr, wr.data}); } diff --git a/passes/sat/formalff.cc b/passes/sat/formalff.cc index bdf673169..a2500bde4 100644 --- a/passes/sat/formalff.cc +++ b/passes/sat/formalff.cc @@ -767,7 +767,7 @@ struct FormalFfPass : public Pass { ff.sig_d = ff.sig_ad; } - if (!ff.has_clk || sigmap(ff.sig_clk) != gate_clock || ff.pol_clk != pol_clk) { + if (!ff.has_clk || sigmap(ff.sig_clk).as_bit() != gate_clock || ff.pol_clk != pol_clk) { log_debug("FF driver for gate enable %s.%s of gated clk bit %s.%s has incompatible clocking: " "%s %s.%s\n", module, log_signal(SigSpec(gate_enable)), module, @@ -798,7 +798,7 @@ struct FormalFfPass : public Pass { auto &mem = memories.at(clocked_cell->name); bool changed = false; for (auto &rd_port : mem.rd_ports) { - if (rd_port.clk_enable && rd_port.clk == clk && rd_port.clk_polarity == pol_clk) { + if (rd_port.clk_enable && rd_port.clk.as_bit() == clk && rd_port.clk_polarity == pol_clk) { log_debug("patching rd port\n"); changed = true; rd_port.clk = gate_clock; @@ -808,7 +808,7 @@ struct FormalFfPass : public Pass { } } for (auto &wr_port : mem.wr_ports) { - if (wr_port.clk_enable && wr_port.clk == clk && wr_port.clk_polarity == pol_clk) { + if (wr_port.clk_enable && wr_port.clk.as_bit() == clk && wr_port.clk_polarity == pol_clk) { log_debug("patching wr port\n"); changed = true; wr_port.clk = gate_clock; diff --git a/pyosys/generator.py b/pyosys/generator.py index f1d429724..4fd7a5698 100644 --- a/pyosys/generator.py +++ b/pyosys/generator.py @@ -376,7 +376,7 @@ class PyosysWrapperGenerator(object): def make_preprocessor_options(self): py_include = get_paths()["include"] preprocessor_bin = shutil.which("clang++") or "g++" - cxx_std = os.getenv("CXX_STD", "c++17") + cxx_std = os.getenv("CXX_STD", "c++20") return ParserOptions( preprocessor=make_gcc_preprocessor( defines=["_YOSYS_", "YOSYS_ENABLE_PYTHON"], diff --git a/tests/functional/test_functional.py b/tests/functional/test_functional.py index aa7500f8b..661af14d1 100644 --- a/tests/functional/test_functional.py +++ b/tests/functional/test_functional.py @@ -21,7 +21,7 @@ def yosys(script): run([base_path / 'yosys', '-Q', '-p', script]) def compile_cpp(in_path, out_path, args): - run(['g++', '-g', '-std=c++17'] + args + [str(in_path), '-o', str(out_path)]) + run(['g++', '-g', '-std=c++20'] + args + [str(in_path), '-o', str(out_path)]) def yosys_synth(verilog_file, rtlil_file): yosys(f"read_verilog {quote(verilog_file)} ; prep ; setundef -undriven -undef ; write_rtlil {quote(rtlil_file)}")