From 25edde1c3ce2acbad448bba02718cdf1fd3d8795 Mon Sep 17 00:00:00 2001
From: "Emil J. Tywoniak" <emil@tywoniak.eu>
Date: Mon, 9 Mar 2026 21:21:45 +0100
Subject: [PATCH] tests: adjust to input_port and init behavior (sketchy)

---
 tests/opt/opt_expr_alu.ys | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/tests/opt/opt_expr_alu.ys b/tests/opt/opt_expr_alu.ys
index 477555da9..b508b2257 100644
--- a/tests/opt/opt_expr_alu.ys
+++ b/tests/opt/opt_expr_alu.ys
@@ -8,7 +8,7 @@ alumacc
 equiv_opt -assert opt_expr -fine
 design -load postopt
 select -assert-count 1 t:$pos
-select -assert-none t:$pos t:* %D
+select -assert-none t:$pos t:* %D t:$input_port %d
 
 
 design -reset
@@ -20,7 +20,7 @@ EOT
 
 alumacc
 select -assert-count 1 t:$alu
-select -assert-none t:$alu t:* %D
+select -assert-none t:$alu t:* %D t:$input_port %d
 
 
 design -reset
@@ -33,7 +33,7 @@ EOT
 equiv_opt -assert opt_expr -fine
 design -load postopt
 select -assert-count 1 t:$pos
-select -assert-none t:$pos t:* %D
+select -assert-none t:$pos t:* %D t:$input_port %d
 
 
 design -reset
@@ -46,7 +46,7 @@ EOT
 equiv_opt -assert opt_expr -fine
 design -load postopt
 select -assert-count 1 t:$pos
-select -assert-none t:$pos t:* %D
+select -assert-none t:$pos t:* %D t:$input_port %d
 
 
 design -reset
@@ -60,7 +60,7 @@ alumacc
 equiv_opt -assert opt_expr -fine
 design -load postopt
 select -assert-count 1 t:$not
-select -assert-none t:$not %% t:* %D
+select -assert-none t:$not %% t:* %D t:$input_port %d
 
 
 design -reset
@@ -76,7 +76,7 @@ design -load postopt
 select -assert-count 1 t:$alu
 select -assert-count 1 t:$alu r:Y_WIDTH=3 %i
 select -assert-count 1 t:$not
-select -assert-none t:$alu t:$not t:* %D %D
+select -assert-none t:$alu t:$not t:* %D %D t:$input_port %d
 
 
 design -reset
@@ -93,7 +93,7 @@ dump
 select -assert-count 2 t:$alu
 select -assert-count 1 t:$alu r:Y_WIDTH=2 %i
 select -assert-count 1 t:$alu r:Y_WIDTH=3 %i
-select -assert-none t:$alu t:* %D
+select -assert-none t:$alu t:* %D t:$input_port %d
 
 
 design -reset
@@ -108,7 +108,7 @@ equiv_opt -assert opt -fine
 design -load postopt
 select -assert-count 2 t:$alu
 select -assert-count 2 t:$alu r:Y_WIDTH=3 %i
-select -assert-none t:$alu t:* %D
+select -assert-none t:$alu t:* %D t:$input_port %d
 
 
 design -reset