Add support for SVA sequence concatenation ranges via verific
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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@@ -35,6 +35,7 @@ generate_sby() {
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cat <<- EOT
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verific -import -extnets -all top
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prep -top top
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chformal -early -assume
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[files]
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EOT
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19
tests/sva/sva_range.sv
Normal file
19
tests/sva/sva_range.sv
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@@ -0,0 +1,19 @@
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module top (
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input clk,
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input a, b, c, d
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);
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default clocking @(posedge clk); endclocking
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assert property (
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a ##[*] b |=> c until ##[*] d
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);
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`ifndef FAIL
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assume property (
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b |=> ##5 d
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);
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assume property (
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b || (c && !d) |=> c
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);
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`endif
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endmodule
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