From 869a7303b0ee0be2e01deab7cd7bbd1bfb087461 Mon Sep 17 00:00:00 2001 From: "Emil J. Tywoniak" Date: Mon, 16 Mar 2026 22:45:29 +0100 Subject: [PATCH] signorm: disable in passes that use swap_names --- frontends/aiger/aigerparse.cc | 3 +++ passes/cmds/abstract.cc | 2 ++ passes/cmds/chformal.cc | 3 +++ passes/opt/wreduce.cc | 3 +++ passes/sat/cutpoint.cc | 3 +++ passes/techmap/abc9_ops.cc | 3 +++ passes/techmap/clkbufmap.cc | 3 +++ passes/techmap/iopadmap.cc | 3 +++ techlibs/ice40/ice40_dsp.cc | 3 +++ techlibs/ice40/ice40_wrapcarry.cc | 3 +++ techlibs/quicklogic/ql_ioff.cc | 3 +++ techlibs/xilinx/xilinx_srl.cc | 3 +++ 12 files changed, 35 insertions(+) diff --git a/frontends/aiger/aigerparse.cc b/frontends/aiger/aigerparse.cc index 4df37c0cd..a7d695bfb 100644 --- a/frontends/aiger/aigerparse.cc +++ b/frontends/aiger/aigerparse.cc @@ -1041,6 +1041,9 @@ struct AigerFrontend : public Frontend { } extra_args(f, filename, args, argidx, true); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + if (module_name.empty()) { #ifdef _WIN32 char fname[_MAX_FNAME]; diff --git a/passes/cmds/abstract.cc b/passes/cmds/abstract.cc index 2ea71268b..968cf9db5 100644 --- a/passes/cmds/abstract.cc +++ b/passes/cmds/abstract.cc @@ -462,6 +462,8 @@ struct AbstractPass : public Pass { } extra_args(args, argidx, design); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); if (enable != Enable::Always) { if (mode == Mode::Initial) log_cmd_error("Conditional initial value abstraction is not supported\n"); diff --git a/passes/cmds/chformal.cc b/passes/cmds/chformal.cc index ccda023c0..2e0df8f76 100644 --- a/passes/cmds/chformal.cc +++ b/passes/cmds/chformal.cc @@ -218,6 +218,9 @@ struct ChformalPass : public Pass { } extra_args(args, argidx, design); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + if (constr_types.empty()) { constr_types.insert(ID($assert)); constr_types.insert(ID($assume)); diff --git a/passes/opt/wreduce.cc b/passes/opt/wreduce.cc index 8a40bc50d..23b3ffb61 100644 --- a/passes/opt/wreduce.cc +++ b/passes/opt/wreduce.cc @@ -579,6 +579,9 @@ struct WreducePass : public Pass { } extra_args(args, argidx, design); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + for (auto module : design->selected_modules()) { if (module->has_processes_warn()) diff --git a/passes/sat/cutpoint.cc b/passes/sat/cutpoint.cc index 1a68776ff..ae90f5151 100644 --- a/passes/sat/cutpoint.cc +++ b/passes/sat/cutpoint.cc @@ -79,6 +79,9 @@ struct CutpointPass : public Pass { } extra_args(args, argidx, design); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + if (flag_blackbox) { if (!design->full_selection()) log_cmd_error("This command only operates on fully selected designs!\n"); diff --git a/passes/techmap/abc9_ops.cc b/passes/techmap/abc9_ops.cc index 2e762d7b9..4000fb598 100644 --- a/passes/techmap/abc9_ops.cc +++ b/passes/techmap/abc9_ops.cc @@ -1833,6 +1833,9 @@ struct Abc9OpsPass : public Pass { } extra_args(args, argidx, design); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + if (!valid) log_cmd_error("At least one of -check, -break_scc, -prep_{delays,xaiger,dff[123],lut,box}, -write_{lut,box}, -reintegrate, -{replace,restore}_zbufs must be specified.\n"); diff --git a/passes/techmap/clkbufmap.cc b/passes/techmap/clkbufmap.cc index 7003c6656..c496e89b9 100644 --- a/passes/techmap/clkbufmap.cc +++ b/passes/techmap/clkbufmap.cc @@ -110,6 +110,9 @@ struct ClkbufmapPass : public Pass { extra_args(args, argidx, design); } + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + if (buf_celltype.empty() && inpad_celltype.empty()) log_error("Either the -buf option or -inpad option is required.\n"); diff --git a/passes/techmap/iopadmap.cc b/passes/techmap/iopadmap.cc index d929de300..66296db30 100644 --- a/passes/techmap/iopadmap.cc +++ b/passes/techmap/iopadmap.cc @@ -186,6 +186,9 @@ struct IopadmapPass : public Pass { } extra_args(args, argidx, design); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + if (!inpad_portname_pad.empty()) ignore.insert(make_pair(RTLIL::escape_id(inpad_celltype), RTLIL::escape_id(inpad_portname_pad))); if (!outpad_portname_pad.empty()) diff --git a/techlibs/ice40/ice40_dsp.cc b/techlibs/ice40/ice40_dsp.cc index 995cdb97e..6c3b365b0 100644 --- a/techlibs/ice40/ice40_dsp.cc +++ b/techlibs/ice40/ice40_dsp.cc @@ -311,6 +311,9 @@ struct Ice40DspPass : public Pass { } extra_args(args, argidx, design); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + for (auto module : design->selected_modules()) ice40_dsp_pm(module, module->selected_cells()).run_ice40_dsp(create_ice40_dsp); } diff --git a/techlibs/ice40/ice40_wrapcarry.cc b/techlibs/ice40/ice40_wrapcarry.cc index fe928ba6d..9f0648b38 100644 --- a/techlibs/ice40/ice40_wrapcarry.cc +++ b/techlibs/ice40/ice40_wrapcarry.cc @@ -108,6 +108,9 @@ struct Ice40WrapCarryPass : public Pass { } extra_args(args, argidx, design); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + for (auto module : design->selected_modules()) { if (!unwrap) ice40_wrapcarry_pm(module, module->selected_cells()).run_ice40_wrapcarry(create_ice40_wrapcarry); diff --git a/techlibs/quicklogic/ql_ioff.cc b/techlibs/quicklogic/ql_ioff.cc index 5574ef4a0..de7f5dbd4 100644 --- a/techlibs/quicklogic/ql_ioff.cc +++ b/techlibs/quicklogic/ql_ioff.cc @@ -24,6 +24,9 @@ struct QlIoffPass : public Pass { { log_header(design, "Executing QL_IOFF pass.\n"); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + ModWalker modwalker(design); Module *module = design->top_module(); if (!module) diff --git a/techlibs/xilinx/xilinx_srl.cc b/techlibs/xilinx/xilinx_srl.cc index 2c23f8f42..04c657df6 100644 --- a/techlibs/xilinx/xilinx_srl.cc +++ b/techlibs/xilinx/xilinx_srl.cc @@ -237,6 +237,9 @@ struct XilinxSrlPass : public Pass { } extra_args(args, argidx, design); + // TODO Disabled signorm because swap_names breaks fanout logic + design->sigNormalize(false); + if (!fixed && !variable) log_cmd_error("'-fixed' and/or '-variable' must be specified.\n");