From 872c940259170f0588844682cc034e2f12a645ea Mon Sep 17 00:00:00 2001
From: "Emil J. Tywoniak" <emil@tywoniak.eu>
Date: Wed, 18 Mar 2026 00:44:20 +0100
Subject: [PATCH] design: fix signorm commit connectivity to design

---
 passes/cmds/design.cc | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/passes/cmds/design.cc b/passes/cmds/design.cc
index ddbd98bfd..bb7f147d5 100644
--- a/passes/cmds/design.cc
+++ b/passes/cmds/design.cc
@@ -338,8 +338,11 @@ struct DesignPass : public Pass {
 		{
 			RTLIL::Design *design_copy = new RTLIL::Design;
 
-			for (auto mod : design->modules())
+			for (auto mod : design->modules()) {
+				// Triggers signorm flush if needed (hacky)
+				(void)mod->connections();
 				design_copy->add(mod->clone());
+			}
 
 			design_copy->selection_stack = design->selection_stack;
 			design_copy->selection_vars = design->selection_vars;