Add "min bits" and "min wports" to xilinx dram rules

2026-04-27 12:40:28 +00:00 · 2019-05-23 11:32:28 -07:00
parent ca46947354
commit 99a3fee8f4
1 changed files with 4 additions and 0 deletions
--- a/techlibs/xilinx/drams.txt
+++ b/techlibs/xilinx/drams.txt
@@ -26,11 +26,15 @@ bram $__XILINX_RAM128X1D
 endbram

 match $__XILINX_RAM64X1D
+  min bits 5
+  min wports 1
  make_outreg
  or_next_if_better
 endmatch

 match $__XILINX_RAM128X1D
+  min bits 9
+  min wports 1
  make_outreg
 endmatch