Renamed port access function on RTLIL::Cell, added param access functions
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@@ -418,7 +418,7 @@ static void dfflibmap(RTLIL::Design *design, RTLIL::Module *module)
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} else
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if (port.second != 0)
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log_abort();
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new_cell->set("\\" + port.first, sig);
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new_cell->setPort("\\" + port.first, sig);
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}
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stats[stringf(" mapped %%d %s cells to %s cells.\n", cell_type.c_str(), new_cell->type.c_str())]++;
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