diff --git a/kernel/rtlil_bufnorm.cc b/kernel/rtlil_bufnorm.cc
index 788b05533..0744a1361 100644
--- a/kernel/rtlil_bufnorm.cc
+++ b/kernel/rtlil_bufnorm.cc
@@ -143,7 +143,8 @@ struct RTLIL::SigNormIndex
 					continue;
 				int i = 0;
 				for (auto bit : sig)
-					fanout[bit].insert(PortBit(cell, port, i++));
+					if (bit.is_wire())
+						fanout[bit].insert(PortBit(cell, port, i++));
 			}
 		}
 	}
@@ -963,6 +964,8 @@ void RTLIL::Cell::unsetPort(const RTLIL::IdString& portname)
 				auto &fanout = module->sig_norm_index->fanout;
 				int counter = 0;
 				for (auto bit : conn_it->second) {
+					if (!bit.is_wire())
+						continue;
 					int i = counter++;
 					auto found = fanout.find(bit);
 					log_assert(found != fanout.end());
@@ -1090,6 +1093,8 @@ void RTLIL::Cell::setPort(const RTLIL::IdString& portname, RTLIL::SigSpec signal
 				auto &fanout = module->sig_norm_index->fanout;
 				int counter = 0;
 				for (auto bit : conn_it->second) {
+					if (!bit.is_wire())
+						continue;
 					int i = counter++;
 					auto found = fanout.find(bit);
 					log_assert(found != fanout.end());
@@ -1111,7 +1116,8 @@ void RTLIL::Cell::setPort(const RTLIL::IdString& portname, RTLIL::SigSpec signal
 			auto &fanout = module->sig_norm_index->fanout;
 			int i = 0;
 			for (auto bit : signal)
-				fanout[bit].insert(PortBit(this, portname, i++));
+				if (bit.is_wire())
+					fanout[bit].insert(PortBit(this, portname, i++));
 		} else if (GetSize(signal)) {
 			Wire *w = signal.as_wire();
 			log_assert(w->driverCell_ == nullptr);