Add -on/-off modes to debug pass

2026-04-27 20:49:44 +00:00 · 2026-01-15 12:07:26 -08:00
parent 967b47d984
commit ed64df737b
2 changed files with 44 additions and 1 deletions
--- a/tests/various/debugon.ys
+++ b/tests/various/debugon.ys
@@ -0,0 +1,14 @@
+# Test debug -on/-off modes
+
+design -reset
+
+read_verilog <<EOT
+module top(input a, input b, output y);
+    assign y = a & b;
+endmodule
+EOT
+
+debug -on
+hierarchy
+select -assert-count 1 t:$and
+debug -off