synth_xilinx to techmap FFs after abc call, otherwise -retime fails
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@@ -256,9 +256,9 @@ struct SynthXilinxPass : public Pass
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Pass::call(design, "opt -full");
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if (vpr) {
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Pass::call(design, "techmap -map +/techmap.v -map +/xilinx/arith_map.v -map +/xilinx/ff_map.v -D _EXPLICIT_CARRY");
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Pass::call(design, "techmap -map +/techmap.v -map +/xilinx/arith_map.v -D _EXPLICIT_CARRY");
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} else {
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Pass::call(design, "techmap -map +/techmap.v -map +/xilinx/arith_map.v -map +/xilinx/ff_map.v");
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Pass::call(design, "techmap -map +/techmap.v -map +/xilinx/arith_map.v");
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}
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Pass::call(design, "hierarchy -check");
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@@ -269,7 +269,7 @@ struct SynthXilinxPass : public Pass
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{
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Pass::call(design, "abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : ""));
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Pass::call(design, "clean");
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Pass::call(design, "techmap -map +/xilinx/lut_map.v");
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Pass::call(design, "techmap -map +/xilinx/lut_map.v -map +/xilinx/ff_map.v");
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}
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if (check_label(active, run_from, run_to, "map_cells"))
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