Emil J. Tywoniak
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72b60b6cef
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signorm: safer indexing if broken invariant
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2026-05-22 18:41:50 +02:00 |
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Emil J. Tywoniak
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b9eae3f64b
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rtlil: publish signorm fanout
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2026-05-22 18:41:49 +02:00 |
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Emil J. Tywoniak
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5dce475325
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signorm: add timers
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2026-05-22 18:40:16 +02:00 |
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Emil J. Tywoniak
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5de8452b57
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rtlil_bufnorm: fix setup_driven_wires constant handling on unknown port direction
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2026-05-22 18:40:16 +02:00 |
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Emil J. Tywoniak
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e73b828e07
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rtlil_bufnorm: more xlog
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2026-05-22 18:40:01 +02:00 |
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Emil J. Tywoniak
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7905df89f3
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rtlil: fix cloneInto in signorm
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2026-05-22 18:40:01 +02:00 |
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Emil J. Tywoniak
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754709aa01
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rtlil: sigNormalize Module when added to Design in signorm mode
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2026-05-22 18:40:00 +02:00 |
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Emil J. Tywoniak
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5355a1739e
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rtlil_bufnorm: more xlog
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2026-05-22 18:39:42 +02:00 |
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Emil J. Tywoniak
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d7b6f1c095
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rtlil_bufnorm: ignore timing info harder
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2026-05-22 18:39:42 +02:00 |
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Emil J. Tywoniak
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5e313a19a0
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ffmerge: initvals signorm compatibility fixup
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2026-05-22 18:39:05 +02:00 |
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Emil J. Tywoniak
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eb6dd47bd6
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timinginfo: special-case $specify2 in signorm invariant
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2026-05-22 18:39:04 +02:00 |
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Emil J. Tywoniak
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7382be6962
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ff: add FfDataSigMapped
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2026-05-22 18:38:37 +02:00 |
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Emil J. Tywoniak
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b42136aa8c
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signorm: remove $input cells when leaving
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2026-05-22 18:37:58 +02:00 |
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Emil J. Tywoniak
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d541def612
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signorm: skip const when fixing fanout
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2026-05-22 18:37:58 +02:00 |
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Emil J. Tywoniak
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422a505435
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satgen: support $connect
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2026-05-22 18:37:58 +02:00 |
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Emil J. Tywoniak
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fb03a34277
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rtlil: add dump_sigmap for hacky signorm debugging
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2026-05-22 18:37:58 +02:00 |
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Emil J. Tywoniak
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6b06869242
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timinginfo: disable output wire check due to signorm
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2026-05-22 18:37:56 +02:00 |
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Emil J. Tywoniak
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6d08c53429
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rtlil: forbid rewrite_sigspecs in signorm
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2026-05-22 18:37:13 +02:00 |
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Emil J. Tywoniak
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e5266d0fbc
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ff: fixup initvals with signorm direct drive wire if it's created, not old driven wire
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2026-05-22 18:37:13 +02:00 |
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Emil J. Tywoniak
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af48c1cdfb
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rtlil: fix zero width SigSpec crash in signorm setPort unsetPort
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2026-05-22 18:37:13 +02:00 |
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Emil J. Tywoniak
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e6515cfd93
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rtlil_bufnorm: fix cell deletion deferral bug
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2026-05-22 18:37:13 +02:00 |
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Emil J. Tywoniak
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8c4816c802
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mem: fix signorm cell type morph
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2026-05-22 18:37:13 +02:00 |
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Jannis Harder
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423c8be71b
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WIP half broken snapshot
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2026-05-22 18:37:11 +02:00 |
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Jannis Harder
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30505c2cd6
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WIP remove dead code
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2026-05-22 18:34:52 +02:00 |
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Emil J. Tywoniak
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0c2786be1f
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threading: make no-op locks specialized to Mutex instead of templates
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2026-05-18 16:26:14 +02:00 |
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Emil J. Tywoniak
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1c831aa50d
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threading: whitespace
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2026-05-18 16:26:14 +02:00 |
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Emil J. Tywoniak
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d322e2fbe0
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threading: redirect locks to no-op when ENABLE_THREADS=0 or undefined YOSYS_ENABLE_THREADS
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2026-05-18 16:14:01 +02:00 |
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Miodrag Milanovic
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75dcbe03c6
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Convert RTLIL::unescape_id of IdString to unescape()
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2026-05-16 19:49:45 +02:00 |
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Miodrag Milanovic
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8bbc3c359c
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Remove id2cstr uses in our code base
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2026-05-16 19:49:45 +02:00 |
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Miodrag Milanović
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1d87cefd80
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Merge pull request #5882 from YosysHQ/std_cpp20
Bump required standard to C++20
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2026-05-15 13:13:43 +00:00 |
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Miodrag Milanović
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36eceed720
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Merge pull request #5862 from codexplorer-fish/cleaning-up-log-id
Cleaning up log_id()
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2026-05-15 11:07:43 +00:00 |
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Miodrag Milanovic
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70b17181b4
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Bump gcc and clang versions
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2026-05-14 10:51:40 +02:00 |
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Miodrag Milanovic
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105011a53b
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Zero array for for MSVC
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2026-05-13 12:05:13 +02:00 |
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Miodrag Milanovic
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1ef6311e5b
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Update documentation and few more defines
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2026-05-13 11:24:45 +02:00 |
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Miodrag Milanovic
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1e28e8ccab
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Handle unused variable for WIN32
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2026-05-13 09:49:39 +02:00 |
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Emil J. Tywoniak
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74efc883c7
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threading: temporarily cast to void unused stuff, until we rework single-threaded builds again
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2026-05-12 23:16:43 +02:00 |
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Emil J. Tywoniak
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4eb1c61bd5
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hashlib: error on unused containers
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2026-05-12 12:51:41 +02:00 |
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Codexplorer
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e41b969da2
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Refactored uses of log_id()
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2026-05-08 20:59:24 -07:00 |
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Codexplorer
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89d83a3410
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Logging now handles classes with an IdString "name" member
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2026-05-08 16:30:25 -07:00 |
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Lofty
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ab316c14d2
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Merge pull request #5844 from YosysHQ/lofty/abc-refactor-5
abc_new: integration testing via synth_gatemate
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2026-05-06 13:40:15 +00:00 |
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Lofty
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de1dd3b1c5
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add aiger2_zbuf to constids
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2026-05-06 14:03:07 +01:00 |
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bin
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5dfe1937a0
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Upgrade to WASI SDK 33 and enable exceptions
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2026-05-01 13:30:43 -04:00 |
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Emil J
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627b691578
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Merge pull request #5831 from stashcroft/main
Make sure co-simulation only uses integer arithmetic
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2026-04-27 14:03:58 +00:00 |
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Emil J
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ec0a102302
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Merge pull request #5832 from YosysHQ/emil/simple-extract
rtlil: rewrite SigSpec::extract for perf and packing
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2026-04-24 19:03:53 +00:00 |
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Emil J. Tywoniak
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10bbda93f7
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rtlil: extend SigSpec::extract test
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2026-04-24 11:04:19 +02:00 |
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Emil J. Tywoniak
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25b9b796c4
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rtlil: complicate extract again for packing
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2026-04-24 11:04:19 +02:00 |
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Scott Ashcroft
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23a05fcf35
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Add comments to make sure it is clear scale is an exponent of 10
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2026-04-23 17:22:14 +01:00 |
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Scott Ashcroft
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e69341cd5f
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Make sure co-simulation only uses integer arithmetic
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2026-04-23 17:22:14 +01:00 |
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Emil J. Tywoniak
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14b0efeced
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rtlil: simplify extract for performance
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2026-04-23 13:58:20 +02:00 |
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Emil J
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64e7ce2f57
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Merge pull request #5803 from YosysHQ/emil/specrule-port-sanity
Fix $specrule port naming inconsistency
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2026-04-22 10:46:36 +00:00 |
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