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Commit Graph

  • beaae79e73 Merge pull request #4021 from povik/booth-wallace N. Engelhardt 2023-11-27 16:26:03 +01:00
  • 9d04201e86 synth_quicklogic: Fix missing FF mapping Martin Povišer 2023-11-27 14:22:28 +01:00
  • 3e004f7b13 quicklogic: Drop blackbox off adder_carry Martin Povišer 2023-11-27 14:21:59 +01:00
  • a3b3333eeb quicklogic: Add basic k6n10f tests Martin Povišer 2023-11-27 12:14:48 +01:00
  • 90f427c7a8 synth_quiclogic: Fix conditioning of bram passes Martin Povišer 2023-10-09 13:18:09 +02:00
  • 74296e3d92 quicklogic: Move pp3 tests one level down Martin Povišer 2023-10-09 13:13:42 +02:00
  • f84ab98055 ql_dsp_macc: Tune DSP inference code Martin Povišer 2023-10-02 15:55:41 +02:00
  • 306e688406 ql_dsp_*: Clean up Martin Povišer 2023-10-02 14:40:10 +02:00
  • 6d7dafe5e5 ql_k6n10f: Remove support for parameter-configured DSP variety Martin Povišer 2023-09-29 14:31:06 +02:00
  • a19ac1bbe1 merge brams_final_map.v into brams_map.v N. Engelhardt 2023-09-18 12:45:06 +02:00
  • 9ce53ea3e2 add dsp inference N. Engelhardt 2023-11-27 10:35:29 +01:00
  • 7c0dbc8822 change ql-bram-types pass to use mode parameter; clean up primitive libraries N. Engelhardt 2023-08-14 16:20:36 +02:00
  • 688455ef69 add qlf_k6n10f architecture + bram inference N. Engelhardt 2023-11-27 09:42:40 +01:00
  • e230a871be synth_quicklogic: rearrange files to prepare for adding more architectures N. Engelhardt 2023-07-07 15:27:21 +02:00
  • 031ad38b5c Bump version github-actions[bot] 2023-11-24 00:15:38 +00:00
  • 5e603c2241 Merge pull request #4042 from YosysHQ/verific_cell Miodrag Milanović 2023-11-23 11:38:01 +01:00
  • 8f207eed1b Add attributes to module instantiation Miodrag Milanovic 2023-11-23 11:01:49 +01:00
  • de16cd253d synth_lattice: Enable booth by default on XO3 Martin Povišer 2023-11-07 14:33:09 +01:00
  • d6566eb344 booth: Redo baseline architecture summation Martin Povišer 2023-11-22 14:59:54 +01:00
  • beb5cb55a5 booth: Expose -lowpower option Martin Povišer 2023-11-22 14:57:13 +01:00
  • 7005ea9411 booth: Revisit help Martin Povišer 2023-11-07 14:53:20 +01:00
  • 48b73be8c6 booth: Replace the default signed architecture Martin Povišer 2023-11-20 17:24:24 +01:00
  • f50894d8bf booth: Drop extra decoder arguments Martin Povišer 2023-11-22 12:44:13 +01:00
  • 579f6bdc17 booth: Do not special-case bottom rows Martin Povišer 2023-11-22 12:42:11 +01:00
  • da207cdce0 booth: Make less assumptions when aligning partial products Martin Povišer 2023-11-22 15:12:15 +01:00
  • 69e994ff75 booth: Clean unused FA index variable Martin Povišer 2023-11-07 14:41:41 +01:00
  • d8408b2350 booth: Move up signed quadrant 1 logic Martin Povišer 2023-11-06 14:24:10 +01:00
  • 8d33cc2fb6 booth: Refactor signed CPA Martin Povišer 2023-11-06 14:18:47 +01:00
  • 00e899f98d booth: Refactor signed multiplier full adders emission Martin Povišer 2023-11-06 14:05:20 +01:00
  • 84568453f8 rtlil: Add lsb() msb() SigSpec helpers Martin Povišer 2023-11-22 12:33:47 +01:00
  • c95298225d Bump version github-actions[bot] 2023-11-21 00:16:08 +00:00
  • 34f851f132 Merge pull request #4040 from povik/fmt-time Martin Povišer 2023-11-20 18:11:24 +01:00
  • 282ce24eec fmt: Handle free-standing time arguments Martin Povišer 2023-11-20 17:25:09 +01:00
  • b23a607421 Merge pull request #4035 from jix/smtbmc-incremental Jannis Harder 2023-11-20 17:00:29 +01:00
  • 191ac91951 Merge pull request #4031 from nakengelhardt/nak/fix_vhdl_blackbox_nullptr Miodrag Milanović 2023-11-20 15:37:01 +01:00
  • ab6c1d368b Bump version github-actions[bot] 2023-11-18 00:15:31 +00:00
  • fa5fb811df Merge pull request #4037 from YosysHQ/lofty/ice40-abc9-oopsie N. Engelhardt 2023-11-17 14:36:16 +01:00
  • 5c96746309 ice40: fix -noabc9 Lofty 2023-11-17 12:49:17 +00:00
  • e319606ec9 smtbmc: Add --incremental mode Jannis Harder 2023-11-16 13:15:54 +01:00
  • 0fb511905a docs: more tidying Krystine Sherwin 2023-11-16 09:46:47 +13:00
  • bb7ebec38c guidelines: fix paths to moved files Krystine Sherwin 2023-11-16 09:11:53 +13:00
  • 2b270b2270 docs: Tidying image generation Krystine Sherwin 2023-11-15 17:39:37 +13:00
  • 032fab1f54 Merge pull request #4032 from YosysHQ/lofty/gowin-abc9-oopsie N. Engelhardt 2023-11-15 11:07:49 +01:00
  • 7eea047793 Bump version github-actions[bot] 2023-11-15 00:15:49 +00:00
  • 309558767d gowin: fix typo Lofty 2023-11-14 22:37:29 +00:00
  • 5fb1264db5 verific: don't try to import attributes from nullptr N. Engelhardt 2023-11-14 15:05:24 +01:00
  • b6e61c16b1 docs: restructuring images directory Krystine Sherwin 2023-11-14 18:54:16 +13:00
  • c11744b4ef Fix WASI compilation flags for abc. Catherine 2023-11-14 03:33:35 +00:00
  • 726c501e7e Update WASI compilation flags to include required libraries Catherine 2023-11-14 02:03:23 +00:00
  • 46408b5da3 Bump version github-actions[bot] 2023-11-14 00:15:32 +00:00
  • dbc38d72cf docs: moving code examples Krystine Sherwin 2023-11-14 12:55:39 +13:00
  • 8e470add4d Merge pull request #4029 from YosysHQ/lofty/abc9-again N. Engelhardt 2023-11-13 17:29:57 +01:00
  • 52d3fa6d77 Merge pull request #4022 from povik/machxo3-qor-work N. Engelhardt 2023-11-13 16:56:06 +01:00
  • 3fef81b537 Merge pull request #4028 from povik/cmp2softlogic N. Engelhardt 2023-11-13 16:53:04 +01:00
  • 6cf50d16a8 Merge pull request #3973 from anonkey/master Jannis Harder 2023-11-13 16:29:05 +01:00
  • 7ae4041e20 ice40, ecp5, gowin: enable ABC9 by default Lofty 2023-11-13 15:12:23 +00:00
  • 04083b4f15 Merge pull request #4027 from YosysHQ/achronix_typo N. Engelhardt 2023-11-13 16:04:24 +01:00
  • 3ffa4b5e5d synth_lattice: Wire up cmp2softlogic as an option Martin Povišer 2023-11-13 10:41:54 +01:00
  • f7d4a855c6 techlibs: Add cmp2softlogic.v to common Martin Povišer 2023-11-13 10:41:31 +01:00
  • 83d2f4f334 techlibs: fix typo in help message Krystine Sherwin 2023-11-13 16:29:52 +13:00
  • 3d70867809 docs: remove synth_machxo2, add _lattice Krystine Sherwin 2023-11-13 16:26:57 +13:00
  • 5691cd0958 Bump version github-actions[bot] 2023-11-08 00:15:30 +00:00
  • fed2720999 synth_lattice: Optimize flip-flop memories better Martin Povišer 2023-11-07 16:25:20 +01:00
  • ee3a4ce14d synth_lattice: Merge NOT gates on DFF control signals Martin Povišer 2023-11-07 16:21:39 +01:00
  • 63cec22a0c Merge pull request #3883 from phsauter/peepopt-shiftadd N. Engelhardt 2023-11-07 10:42:15 +01:00
  • 8808da243b Next dev cycle Miodrag Milanovic 2023-11-07 08:47:34 +01:00
  • cc31c6ebc4 Release version 0.35 yosys-0.35 Miodrag Milanovic 2023-11-07 08:45:31 +01:00
  • d415b4d98a cli: Cleanups for tcl argument handling Jannis Harder 2023-11-06 16:40:13 +01:00
  • 3618294bac peepopt: Add assert of consistent shiftadd data phsauter 2023-11-06 16:35:00 +01:00
  • 93a426cbbf Merge pull request #4008 from nakengelhardt/mem_libmap_data_attr lofty/abc9-by-default N. Engelhardt 2023-11-06 16:25:38 +01:00
  • c58fec636f Merge pull request #4015 from YosysHQ/log_verific Miodrag Milanović 2023-11-06 16:22:30 +01:00
  • c3b8de54da test: add tests for shiftadd and shiftmul phsauter 2023-11-06 14:01:37 +01:00
  • b6df900bcc peepopt: Describe shiftadd rule in help message Philippe Sauter 2023-11-06 14:01:37 +01:00
  • 9ca57d9f13 peepopt: fix and refactor shiftadd phsauter 2023-11-06 14:01:37 +01:00
  • 72c6a01e67 peepopt: Add initial shiftadd pattern Philippe Sauter 2023-11-06 14:01:37 +01:00
  • 6f1ca68712 Bump version github-actions[bot] 2023-11-04 00:14:46 +00:00
  • 1260766d91 Merge pull request #4020 from YosysHQ/revert-4019-lofty/abc9-by-default Lofty 2023-11-03 14:53:15 +00:00
  • b8b47f7c6c Revert "ice40, ecp5: enable ABC9 by default" Lofty 2023-11-03 14:52:52 +00:00
  • deebb82e85 Merge pull request #4019 from YosysHQ/lofty/abc9-by-default Lofty 2023-11-03 14:12:56 +00:00
  • ea91f189a3 cli(tcl): add ability to pass argument to tcl script from cli anonkey 2023-10-02 17:18:33 +02:00
  • 32082477b5 ice40, ecp5: enable ABC9 by default Lofty 2023-11-02 19:05:41 +00:00
  • f06d56d224 Handling non-existing location in verific logs Miodrag Milanovic 2023-11-03 08:06:16 +01:00
  • 4eb18e1f07 change verific log callback api Miodrag Milanovic 2023-11-01 08:13:27 +01:00
  • a283595798 docs: call make resources before make all Krystine Sherwin 2023-11-01 13:29:40 +13:00
  • 8fad77bd0f Merge branch 'master' into krys/docs Krystine Sherwin 2023-11-01 13:17:31 +13:00
  • 2b10bd5070 docs: update images makefile Krystine Sherwin 2023-11-01 10:47:55 +13:00
  • 8e07030fee docs: update auxiliary programs Krystine Sherwin 2023-11-01 10:13:28 +13:00
  • f9ab6e147a mem: only import attributes from ports if the memory doesn't have them yet N. Engelhardt 2023-10-30 16:30:34 +01:00
  • 74c1fc1cdd docs: Reference chapters with doc tag Krystine Sherwin 2023-10-30 22:38:47 +13:00
  • d4e45cdccb docs: Stub new(er) auxlibs and auxprogs Krystine Sherwin 2023-10-30 11:13:48 +13:00
  • e49903f8b1 List all synth commands on synth page Krystine Sherwin 2023-10-30 10:57:22 +13:00
  • a1c3755dd6 Fix typo Krystine Sherwin 2023-10-30 10:33:22 +13:00
  • abd92225a3 Replace 010 and 012 with pdf Krystine Sherwin 2023-10-30 10:33:00 +13:00
  • 672375ed02 Bump version github-actions[bot] 2023-10-26 00:14:46 +00:00
  • 6ffc315936 cxxrtl: export wire attributes through the C API. Catherine 2023-10-09 11:45:12 +00:00
  • 080da693d1 memory_libmap: update search order for attributes N. Engelhardt 2023-10-24 13:55:45 +02:00
  • 833b67af80 verific: import attributes on ports N. Engelhardt 2023-10-20 18:31:41 +02:00
  • 1b6d1e9419 memory_libmap: look for ram_style attributes on surrounding signals N. Engelhardt 2023-10-19 19:12:36 +02:00
  • d21c464ae4 Merge pull request #3946 from rmlarsen/toposort Lofty 2023-10-17 13:00:18 +01:00
  • 5f78d1d03e Merge pull request #4003 from povik/pp3-test-fix Lofty 2023-10-17 12:25:09 +01:00