45 lines
870 B
Plaintext
45 lines
870 B
Plaintext
module retention_cell (B1, B2B, CK, D, Q, RD, SE, SI);
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reg Q1, QN1;
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wire Q1_clear, Q1_preset;
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reg Q2, QN2;
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input B1;
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input B2B;
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input CK;
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input D;
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output Q;
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assign Q = Q1; // "Q1"
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input RD;
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input SE;
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input SI;
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always @(posedge CK, posedge Q1_clear, posedge Q1_preset) begin
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if (Q1_clear) begin
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Q1 <= 0;
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end
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else if (Q1_preset) begin
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Q1 <= 1;
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end
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else begin
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Q1 <= ((D&(~SE))|(SI&SE));
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end
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end
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always @(posedge CK, posedge Q1_clear, posedge Q1_preset) begin
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if (Q1_clear) begin
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QN1 <= 1;
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end
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else if (Q1_preset) begin
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QN1 <= 0;
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end
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else begin
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QN1 <= ~(((D&(~SE))|(SI&SE)));
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end
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end
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assign Q1_clear = (((~B2B)&(~Q2))|(~RD));
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assign Q1_preset = ((~B2B)&Q2);
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always @* begin
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if (B1) begin
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Q2 <= Q1;
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QN2 <= ~(Q1);
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end
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end
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endmodule
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