Jannis Harder c0063288d6 Add the $anyinit cell and the formalff pass ...

These can be used to protect undefined flip-flop initialization values
from optimizations that are not sound for formal verification and can
help mapping all solver-provided values in witness traces for flows that
use different backends simultaneously.

2022-08-16 13:37:30 +02:00

..

achronix

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

anlogic

anlogic: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

common

Add the $anyinit cell and the formalff pass

2022-08-16 13:37:30 +02:00

coolrunner2

Blackbox all whiteboxes after synthesis

2021-03-17 21:07:20 +00:00

easic

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

ecp5

Add -no-rw-check option to memory_dff + memory + synth_{ice40,ecp5,gowin}.

2022-06-02 23:16:12 +02:00

efinix

efinix: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

gatemate

Fix static initialization, fixes mingw build

2022-07-04 19:31:38 +02:00

gowin

Apicula now supports lutram

2022-07-03 12:45:03 +02:00

greenpak4

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

ice40

Order ports with default assignments first

2022-08-09 23:42:24 -04:00

intel

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

intel_alm

intel_alm: M10K write-enable is negative-true

2022-03-09 20:18:06 +00:00

machxo2

machxo2: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

nexus

nexus: Fix BRAM mapping.

2022-08-09 23:47:55 +02:00

quicklogic

Fix the help message of synth_quicklogic.

2022-01-31 02:23:59 +08:00

sf2

Fixing old e-mail addresses and deadnames

2021-06-08 00:39:36 +02:00

xilinx

xilinx: Use memory_libmap pass.

2022-05-18 17:32:56 +02:00

.gitignore

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