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05466790a6152f7594e3506b3360e604df6df607
YosysHQ.yosys
/
frontends
/
verilog
History
Clifford Wolf
67b1026297
Merge pull request
#591
from hzeller/virtual-override
...
Consistent use of 'override' for virtual methods in derived classes.
2018-08-15 14:05:38 +02:00
..
.gitignore
Updated .gitignore file for ilang and verilog frontends
2014-10-15 01:14:38 +02:00
const2ast.cc
Convert more log_error() to log_file_error() where possible.
2018-07-20 09:37:44 -07:00
Makefile.inc
Adjust makefiles to work with out-of-tree builds
2015-08-12 15:04:44 +02:00
preproc.cc
Support SystemVerilog `` extension for macros
2018-05-17 00:09:56 -04:00
verilog_frontend.cc
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
verilog_frontend.h
Remember global declarations and defines accross read_verilog calls
2016-11-15 12:42:43 +01:00
verilog_lexer.l
Merge pull request
#513
from udif/pr_reg_wire_error
2018-08-15 13:35:41 +02:00
verilog_parser.y
Merge pull request
#513
from udif/pr_reg_wire_error
2018-08-15 13:35:41 +02:00