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YosysHQ.yosys/techlibs/efinix/gbuf_map.v
2020-07-04 20:53:43 +02:00

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Verilog

module \$__EFX_GBUF (input I, output O);
EFX_GBUFCE #(.CE_POLARITY(1'b1)) _TECHMAP_REPLACE_ (.I(I), .O(O), .CE(1'b1));
endmodule