Eddie Hung 0597a3ea23 Rename to XilinxDspPass

2019-08-13 10:23:07 -07:00

..

cmds

substr() -> compare()

2019-08-07 12:20:08 -07:00

equiv

substr() -> compare()

2019-08-07 12:20:08 -07:00

fsm

RTLIL::S{0,1} -> State::S{0,1}

2019-08-07 11:12:38 -07:00

hierarchy

stoi -> atoi

2019-08-07 11:09:17 -07:00

memory

stoi -> atoi

2019-08-07 11:09:17 -07:00

opt

Merge remote-tracking branch 'origin/master' into eddie/fix_1262

2019-08-11 21:13:40 -07:00

pmgen

Rename to XilinxDspPass

2019-08-13 10:23:07 -07:00

proc

Merge pull request #1258 from YosysHQ/eddie/cleanup

2019-08-10 09:52:14 +02:00

sat

substr() -> compare()

2019-08-07 12:20:08 -07:00

techmap

Merge pull request #1258 from YosysHQ/eddie/cleanup

2019-08-10 09:52:14 +02:00

tests

Merge remote-tracking branch 'origin/master' into xc7dsp

2019-08-12 11:32:10 -07:00