Robert O'Callahan 087ebdd6e4 Move Design::sort() calls out of opt and opt_clean passes into the synth passes that need them.

2026-03-27 15:16:08 +01:00

..

_downloads

Replace 010 and 012 with pdf

2023-10-30 10:34:30 +13:00

_images

mk: Fall back to cp if rsync is not available

2025-03-24 18:06:17 +01:00

_static

Reapply "Add groups to command reference"

2025-08-06 13:52:12 +12:00

appendix

Reapply "Add groups to command reference"

2025-08-06 13:52:12 +12:00

cell

docs: mention related effects for multiplexers in the cell library.

2025-05-30 21:43:33 -06:00

cmd

docs typo: -dump-cmds-json

2025-09-23 14:36:27 +01:00

code_examples

Move Design::sort() calls out of opt and opt_clean passes into the synth passes that need them.

2026-03-27 15:16:08 +01:00

getting_started

docs: Update ubuntu apt-get

2025-08-11 13:34:10 +02:00

using_yosys

verilog: add support for SystemVerilog string literals.

2025-08-11 13:34:10 +02:00

yosys_internals

.github: typos

2025-09-30 11:03:19 +02:00

bib.rst

Add todo

2023-12-13 10:15:51 +13:00

cell_index.rst

Docs: Comments from @jix

2024-10-15 07:37:20 +13:00

cmd_ref.rst

Reapply "Add groups to command reference"

2025-08-06 13:52:12 +12:00

conf.py

Release version 0.57

2025-09-04 08:00:38 +02:00

index.rst

Reapply "Add groups to command reference"

2025-08-06 13:52:12 +12:00

introduction.rst

Docs: Fix nested list

2024-11-05 13:48:48 +13:00

literature.bib

Rst docs conversion (#3496)

2022-11-15 12:55:22 +01:00

requirements.txt

Docs: Switch to furo-ys

2024-10-15 07:24:14 +13:00