Clifford Wolf 4147b55c23 Added "autoidx" statement to ilang file format

2014-07-21 15:15:18 +02:00

..

ast

Implemented dynamic bit-/part-select for memory writes

2014-07-17 16:49:23 +02:00

ilang

Added "autoidx" statement to ilang file format

2014-07-21 15:15:18 +02:00

liberty

Replaced depricated NEW_WIRE macro with module->addWire() calls

2014-07-21 12:42:02 +02:00

verific

Fixed mapping of Verific WIDE_DFFRS operator

2014-03-20 13:40:01 +01:00

verilog

fixed parsing of constant with comment between size and value

2014-07-02 06:27:04 +02:00

vhdl2verilog

Added passing of various options to vhdl2verilog

2014-07-12 10:02:39 +02:00