Clifford Wolf 4be4969bae Improved verilog parser errors

2016-08-25 11:44:37 +02:00

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ast

Fixed bug with memories that do not have a down-to-zero data width

2016-08-22 14:27:46 +02:00

blif

Added "read_blif -sop"

2016-06-18 12:33:13 +02:00

ilang

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

liberty

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

verific

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

verilog

Improved verilog parser errors

2016-08-25 11:44:37 +02:00

vhdl2verilog

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00