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18806f1ef653f29654533ee47fd8a1b0cf1d645a
YosysHQ.yosys/passes
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Marcelina Kościelnicka 18806f1ef6 memory_bram: Reuse extract_rdff helper for make_outreg. 
Also properly skip read ports with init value or reset when not making
use of make_outreg.  Proper support for matching those will land later.
2021-05-25 22:42:03 +02:00
..
cmds
kernel/rtlil: Extract some helpers for checking memory cell types.
2021-05-22 21:43:00 +02:00
equiv
equiv: Suggest running async2sync or clk2fflogic where appropriate.
2021-03-30 18:20:21 +02:00
fsm
Use C++11 final/override keywords.
2020-06-18 23:34:52 +00:00
hierarchy
Sign extend port connections where necessary
2020-12-18 20:33:14 -07:00
memory
memory_bram: Reuse extract_rdff helper for make_outreg.
2021-05-25 22:42:03 +02:00
opt
opt_mem: Add reset/init value support.
2021-05-25 20:06:00 +02:00
pmgen
Add _pm.h files to GENLIST, fixes vcxsrc target
2021-03-11 15:56:32 +01:00
proc
proc_arst: Add special-casing of clock signal in conditionals.
2021-03-15 17:17:29 +01:00
sat
sim: Add wide port support.
2021-05-25 02:57:32 +02:00
techmap
kernel/rtlil: Extract some helpers for checking memory cell types.
2021-05-22 21:43:00 +02:00
tests
Replace "ILANG" with "RTLIL" everywhere.
2020-08-26 17:29:32 +00:00