Emil J 18abf2d4f7 Merge pull request #5138 from YosysHQ/emil/libcache-verbose ...

libcache: add -quiet and -verbose

2025-05-24 00:05:46 +02:00

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aiger

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alumacc

macc_v2: Add test

2025-01-27 13:19:26 +01:00

arch

URAM mapping : Add test for 2048 x 144b

2025-05-10 14:53:56 +02:00

asicworld

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bind

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blif

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bram

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cxxrtl

Reinstate #4768

2025-04-08 11:58:05 +12:00

errors

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fmt

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fsm

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functional

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hana

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liberty

libcache: fix test

2025-05-09 12:40:38 +02:00

lut

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memfile

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memlib

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memories

rtlil: Adjust internal check for $mem_v2 cells

2024-11-08 15:18:43 +01:00

opt

tests: more complete testing of shift edgecases

2025-05-08 11:09:01 +02:00

opt_share

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peepopt

Add muldiv_c peepopt pass

2025-04-30 08:06:59 -07:00

proc

Merge pull request #4714 from georgerennie/george/proc_dff_bug_multiple_sigs

2024-11-20 13:26:32 +01:00

realmath

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rpc

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sat

share: Cleanup and additional testing

2025-04-15 12:34:46 +02:00

select

design.cc: Fix selections when copying

2025-04-08 16:35:12 +12:00

share

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sim

fstdata.cc: Fix last step

2025-05-12 13:18:19 +12:00

simple

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simple_abc9

Reinstate #4768

2025-04-08 11:58:05 +12:00

smv

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sva

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svinterfaces

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svtypes

test: restore verific handling, nicer naming

2024-12-13 10:24:47 +01:00

techmap

Add check at constmap and merge test

2025-04-14 11:44:52 +01:00

tools

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unit

rtlil: Add {from,to}_hdl_index methods to Wire

2025-02-18 17:08:45 +01:00

various

cutpoint: Re-add whole module optimization

2025-05-06 09:57:34 +12:00

verific

Merge pull request #4814 from YosysHQ/emil/make-test-fasterer

2024-12-18 19:02:39 +01:00

verilog

verific: support single_bit_vector

2025-05-12 13:23:29 +02:00

vloghtb

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xprop

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gen-tests-makefile.sh

Update gen-tests-makefile.sh

2025-03-27 10:33:51 +13:00