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YosysHQ.yosys/tests
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whitequark ffbd813a8c
Merge pull request #2550 from zachjs/macro-arg-spaces 
verilog: allow spaces in macro arguments
2021-01-25 10:36:07 +00:00
..
aiger
switch argument order to work with macOS getopt
2020-09-23 12:48:26 +02:00
arch
nexus: DSP inference support
2020-11-20 08:45:55 +00:00
asicworld
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bram
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errors
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fsm
tests: fsm to use a randomly-generated seed
2020-04-24 14:31:33 -07:00
hana
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liberty
dfflibmap: Refactor to use dfflegalize internally.
2020-07-09 18:51:03 +02:00
lut
Forgot to commit
2019-07-16 12:44:26 -07:00
memfile
Added 'set -e' into tests/memfile/run-test.sh
2020-02-06 10:45:40 -03:00
memories
tests: Parallelize
2020-09-21 15:07:02 +02:00
opt
opt_share: Fix X and CO signal width for shifted $alu in opt_share.
2021-01-14 14:54:08 +01:00
opt_share
tests: Parallelize
2020-09-21 15:07:02 +02:00
proc
proc_clean: fix order of switch insertion.
2019-08-19 16:44:23 +00:00
realmath
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rpc
rpc test: make frontend listen before launching yosys & introduce safeguard if yosys errors
2020-03-06 15:29:01 +01:00
sat
Merge pull request #2378 from udif/pr_dollar_high_low
2020-10-01 18:17:36 +02:00
select
Merge pull request #1949 from YosysHQ/eddie/select_blackbox
2020-04-22 15:35:05 -07:00
share
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simple
verilog: allow spaces in macro arguments
2021-01-20 08:49:58 -07:00
simple_abc9
abc9: test to use box file instead of auto
2020-05-14 10:33:56 -07:00
smv
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sva
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svinterfaces
Fix typo in tests/svinterfaces/runone.sh
2019-05-03 14:40:51 +02:00
svtypes
Add typedef input/output test
2021-01-18 17:31:22 +01:00
techmap
tests: Centralize test collection and Makefile generation
2020-09-21 15:07:02 +02:00
tools
Replace opt_rmdff with opt_dff.
2020-08-07 13:21:03 +02:00
unit
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various
Allow combination of rand and const modifiers
2021-01-21 08:42:05 -07:00
verilog
sv: fix support wire and var data type modifiers
2021-01-20 09:16:21 -07:00
vloghtb
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gen-tests-makefile.sh
tests: Parallelize
2020-09-21 15:07:02 +02:00