Krystine Sherwin 494f475346 analogdevices: Extra tests ...

`mem_gen.py` based on quicklogic tests.
Remove BUFG from `lutram.ys`.
Extra `sync_ram_sp` models in `arch/common/blockram.v`.
Add analogdevices to main makefile tests.
Not all the other tests are passing, but that's fine for now.

2026-01-22 18:32:36 +00:00

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memory_attributes

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add_sub.v

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adffs.v

Allow initial blocks to be disabled during tests

2021-11-13 21:53:25 +01:00

blockram.v

analogdevices: Extra tests

2026-01-22 18:32:36 +00:00

blockrom.v

tests: fix blockrom.v driver conflict

2024-12-02 16:56:42 +01:00

counter.v

Fix files with CRLF line endings

2021-06-09 12:16:33 +02:00

dffs.v

Allow initial blocks to be disabled during tests

2021-11-13 21:53:25 +01:00

fsm.v

Fix files with CRLF line endings

2021-06-09 12:16:33 +02:00

latches.v

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logic.v

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lutram.v

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mul.v

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mux.v

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shifter.v

Allow initial blocks to be disabled during tests

2021-11-13 21:53:25 +01:00

tribuf.v

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