Eddie Hung 8119383f81 Constant driven signals are also an input to submodules

2019-11-22 17:23:51 -08:00

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hierarchy.cc

Adopt @cliffordwolf's suggestion

2019-09-03 12:18:50 -07:00

Makefile.inc

Rename "singleton" pass to "uniquify"

2017-08-20 12:31:50 +02:00

submod.cc

Constant driven signals are also an input to submodules

2019-11-22 17:23:51 -08:00

uniquify.cc

Add "whitebox" attribute, add "read_verilog -wb"

2019-04-18 17:45:47 +02:00