Marcelina Kościelnicka 38a0c30d65 Get rid of dffsr2dff. ...

This pass is a proper subset of opt_rmdff, which is called by opt, which
is called by every synth flow in the coarse part.  Thus, it never
actually does anything and can be safely removed.

2020-04-15 16:22:37 +02:00

..

arria10gx

synth_intel: a10gx -> arria10gx

2019-12-10 13:48:10 +00:00

common

intel: Map M9K BRAM only on families that have it

2019-07-23 18:11:11 +01:00

cyclone10lp

synth_intel: cyclone10 -> cyclone10lp

2019-12-10 13:47:58 +00:00

cycloneiv

Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device

2018-03-31 22:48:47 -06:00

cycloneive

Reduce amount of trailing whitespace in code base

2019-02-28 14:58:11 -08:00

cyclonev

Fixing issues in CycloneV cell sim

2019-04-11 19:59:03 -05:00

max10

Fixed broken Quartus backend on dffeas init value (Error (12170): Illegal value for the POWER_UP parameter. Fixed and tested Cyclone V device

2018-03-31 22:48:47 -06:00

Makefile.inc

synth_intel_alm: alternative synthesis for Intel FPGAs

2020-04-15 11:40:41 +02:00

synth_intel.cc

Get rid of dffsr2dff.

2020-04-15 16:22:37 +02:00