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YosysHQ.yosys/techlibs/gowin
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Pepijn de Vos 2fb20f184a Revert "add MUX support" 
It turns out that they make everything worse and they don't PnR.

This reverts commit 3eff2271d0.
2019-09-06 11:28:17 +02:00
..
arith_map.v
Updating gowin
2019-09-02 17:43:27 -05:00
bram.txt
support bram initialisation
2019-09-05 17:25:51 +02:00
brams_init3.vh
GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow
2019-04-12 23:40:02 -05:00
brams_init.py
support bram initialisation
2019-09-05 17:25:51 +02:00
brams_map.v
fix BRAM width and init
2019-09-06 10:55:04 +02:00
cells_map.v
Revert "add MUX support"
2019-09-06 11:28:17 +02:00
cells_sim.v
Revert "add MUX support"
2019-09-06 11:28:17 +02:00
determine_init.cc
Fix formatting for msys2 mingw build using GetSize
2019-08-01 17:27:34 +02:00
dram.txt
GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow
2019-04-12 23:40:02 -05:00
drams_map.v
GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flow
2019-04-12 23:40:02 -05:00
Makefile.inc
support bram initialisation
2019-09-05 17:25:51 +02:00
synth_gowin.cc
Revert "add MUX support"
2019-09-06 11:28:17 +02:00