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YosysHQ.yosys/kernel
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Clifford Wolf e9a756aa7a Merge pull request #1213 from YosysHQ/eddie/wreduce_add 
wreduce/opt_expr: improve width reduction for $add and $sub cells
2019-08-07 14:27:35 +02:00
..
bitpattern.h
…
calc.cc
Fix mingw compile issue (2nd attempt)
2017-02-23 14:21:02 +01:00
cellaigs.cc
Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs
2019-08-06 04:47:55 +02:00
cellaigs.h
…
celledges.cc
Renamed AbstractCellEdgesDatabase::add_cell() to add_edges_from_cell()
2016-07-25 16:39:25 +02:00
celledges.h
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
celltypes.h
Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs
2019-08-06 04:47:55 +02:00
consteval.h
Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs
2019-08-06 04:47:55 +02:00
cost.h
Tweak default gate costs, cleanup "stat -tech cmos"
2019-08-07 10:25:51 +02:00
driver.cc
Be less aggressive with running design->check()
2019-08-06 19:21:37 +02:00
hashlib.h
Add hashlib "<container>::element(int n)" methods
2019-03-14 22:04:42 +01:00
log.cc
Revert "Add log_checkpoint function and use it in opt_muxtree"
2019-07-15 08:35:48 -07:00
log.h
Revert "Add log_checkpoint function and use it in opt_muxtree"
2019-07-15 08:35:48 -07:00
macc.h
…
modtools.h
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
register.cc
Merge pull request #1253 from YosysHQ/clifford/check
2019-08-07 12:14:41 +02:00
register.h
Consistent use of 'override' for virtual methods in derived classes.
2018-07-20 23:51:06 -07:00
rtlil.cc
Restore original SigSpec::extract()
2019-08-06 15:24:55 -07:00
rtlil.h
Add SigSpec::extract_end() convenience function
2019-08-06 15:25:11 -07:00
satgen.h
Add $_NMUX_, add "abc -g cmos", add proper cmos cell costs
2019-08-06 04:47:55 +02:00
sigtools.h
SigMap performance improvement
2016-02-01 10:10:20 +01:00
utils.h
…
yosys.cc
Be less aggressive with running design->check()
2019-08-06 19:21:37 +02:00
yosys.h
New mxe hacks needed to support 2ca237e
2019-08-01 17:28:07 +02:00