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YosysHQ.yosys/tests
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Rodrigo Alejandro Melo 313a425bd5 Merge branch 'master' of https://github.com/YosysHQ/yosys 
Solved a conflict into the CHANGELOG

Signed-off-by: Rodrigo Alejandro Melo <rmelo@inti.gob.ar>
2020-02-03 10:56:41 -03:00
..
aiger
Add testcases
2020-01-07 11:44:20 -08:00
arch
Merge pull request #1559 from YosysHQ/efinix_test_fix
2020-01-29 11:18:06 +01:00
asicworld
Fix FIRRTL to Verilog process instance subfield assignment.
2019-02-25 16:18:13 -08:00
bram
Added support for (single-clock) transparent memories to bram tests
2016-11-01 10:03:13 +01:00
errors
Rename the generic "Syntax error" message from the Verilog/SystemVerilog parser into unique,
2018-10-25 02:37:56 +03:00
fsm
Speed up "make test" and related cleanups
2019-08-17 14:37:07 +02:00
hana
Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.
2016-09-22 11:49:29 -06:00
liberty
Liberty file parser now accepts superfluous ;
2019-03-27 15:16:19 +01:00
lut
Forgot to commit
2019-07-16 12:44:26 -07:00
memfile
Removed 'synth' into tests/memfile/run-test.sh
2020-02-02 12:34:27 -03:00
memories
memory_dff: Fix checking of feedback mux input when more than one mux
2019-07-02 13:35:50 +01:00
opt
opt_share: Fix handling of fine cells.
2019-11-27 08:01:07 +01:00
opt_share
Support various binary operators in opt_share
2019-08-04 19:06:38 +02:00
proc
proc_clean: fix order of switch insertion.
2019-08-19 16:44:23 +00:00
realmath
Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.
2016-09-22 11:49:29 -06:00
rpc
rpc: new frontend.
2019-09-30 15:53:11 +00:00
sat
Even more obvious testcase
2019-12-11 23:52:05 -08:00
share
Add optional SEED=n command line option to Makefile, and -S n command line option to test scripts, for deterministic regression tests.
2016-09-22 11:49:29 -06:00
simple
Make SV2017 compliant courtesy of @wsnyder
2019-12-12 07:34:07 -08:00
simple_abc9
simple_abc9 tests to discard whitebox before write for sim
2020-01-23 22:07:43 -08:00
smv
Progress in SMV back-end
2015-06-19 14:08:46 +02:00
sva
Fix "verific -extnets" for more complex situations
2019-03-26 14:17:46 +01:00
svinterfaces
Fix typo in tests/svinterfaces/runone.sh
2019-05-03 14:40:51 +02:00
svtypes
Use "(id)" instead of "id" for types as temporary hack
2019-10-14 05:24:31 +02:00
techmap
Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
2020-01-15 16:42:16 -08:00
tools
autotest.sh to define _AUTOTB when test_autotb
2019-06-28 14:56:22 -07:00
unit
Build hotfix in tests/unit/Makefile
2016-12-11 10:58:49 +01:00
various
sv: More tests for wildcard port connections
2020-02-02 16:12:33 +00:00
vloghtb
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