Clifford Wolf 23afeadb5e Fixed handling of transparent bram rd ports on ROMs

2016-08-27 17:06:22 +02:00

..

Makefile.inc

Added memory_memx pass, "memory -memx", and "prep -memx"

2016-08-19 19:48:26 +02:00

memory_bram.cc

Fixed handling of transparent bram rd ports on ROMs

2016-08-27 17:06:22 +02:00

memory_collect.cc

Optimize memory address port width in wreduce and memory_collect, not verilog front-end

2016-08-19 18:38:25 +02:00

memory_dff.cc

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

memory_map.cc

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

memory_memx.cc

Added memory_memx pass, "memory -memx", and "prep -memx"

2016-08-19 19:48:26 +02:00

memory_share.cc

Fixed bug in memory_share for memory ports with different ABITS

2016-08-22 14:26:33 +02:00

memory_unpack.cc

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

memory.cc

Added memory_memx pass, "memory -memx", and "prep -memx"

2016-08-19 19:48:26 +02:00