Andrew Zonenberg 41bbad4e4c Fixed typo in port name

2016-05-07 21:14:42 -07:00

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common

Added "prep -flatten" and "synth -flatten"

2016-04-24 00:48:33 +02:00

greenpak4

Fixed typo in port name

2016-05-07 21:14:42 -07:00

ice40

Added synth_ice40 support for latches via logic loops

2016-05-06 23:02:37 +02:00

xilinx

Added "yosys -D" feature

2016-04-21 23:28:37 +02:00

.gitignore

added .gitignore files

2013-01-05 11:19:11 +01:00