Karol Gugala cc7d18d29a frontend: json: parse negative values ...

Signed-off-by: Karol Gugala <kgugala@antmicro.com>

2021-02-23 00:26:11 +01:00

..

aiger

Remove YS_ATTRIBUTE(unused) where present just for log_assert()/log_debug().

2020-06-19 15:48:58 +00:00

ast

verilog: support recursive functions using ternary expressions

2021-02-12 14:43:42 -05:00

blif

Use C++11 final/override keywords.

2020-06-18 23:34:52 +00:00

json

frontend: json: parse negative values

2021-02-23 00:26:11 +01:00

liberty

Use C++11 final/override keywords.

2020-06-18 23:34:52 +00:00

rpc

Fix argument handling in connect_rpc

2020-10-19 13:40:57 +02:00

rtlil

rtlil: remove dotted identifiers.

2020-11-25 16:47:20 +00:00

verific

Merge pull request #2574 from dh73/master

2021-02-15 17:49:11 +01:00

verilog

verilog: error on macro invocations with missing argument lists

2021-02-19 09:18:41 -05:00